This SPI controller seems to be tested on SPI flash only before mass
production and some bits are swizzled under other SPI modes probably
due to incorrect wiring inside the silicon. Reject all modes except
mode0 because they are broken.
Signed-off-by: Chuanhong Guo <gch981213@xxxxxxxxx>
---
drivers/staging/mt7621-spi/spi-mt7621.c | 23 ++++++++++-------------
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/staging/mt7621-spi/spi-mt7621.c b/drivers/staging/mt7621-spi/spi-mt7621.c
index 8af6f307e176..fb189e3ce3f2 100644
--- a/drivers/staging/mt7621-spi/spi-mt7621.c
+++ b/drivers/staging/mt7621-spi/spi-mt7621.c
@@ -137,19 +137,16 @@ static int mt7621_spi_prepare(struct spi_device *spi, unsigned int speed)
reg |= MT7621_LSB_FIRST;
reg &= ~(MT7621_CPHA | MT7621_CPOL);
- switch (spi->mode & (SPI_CPOL | SPI_CPHA)) {
- case SPI_MODE_0:
- break;
- case SPI_MODE_1:
- reg |= MT7621_CPHA;
- break;
- case SPI_MODE_2:
- reg |= MT7621_CPOL;
- break;
- case SPI_MODE_3:
- reg |= MT7621_CPOL | MT7621_CPHA;
- break;
- }
+
+ /* This SPI controller is designed for SPI flash only and
+ * some bits are swizzled under other SPI modes due to
+ * incorrect wiring inside the silicon. Reject all modes
+ * except mode0 because they are broken.
+ */
+
+ if ((spi->mode & (SPI_CPOL | SPI_CPHA)) != SPI_MODE_0)
+ return -EINVAL;
+
mt7621_spi_write(rs, MT7621_SPI_MASTER, reg);
return 0;
--
2.19.1
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