On 09/14/2018 06:22 AM, Phil Elwell wrote:
> Use the compatible string in the DTB to select the correct cache line
> size for the SoC - 32 for BCM2835, and 64 for BCM2836 and BCM2837.
>
> Signed-off-by: Phil Elwell <phil@xxxxxxxxxxxxxxx>
> ---
[snip]
> @@ -170,6 +170,14 @@ static struct device *vchiq_dev;
> static DEFINE_SPINLOCK(msg_queue_spinlock);
> static struct platform_device *bcm2835_camera;
>
> +static struct vchiq_drvdata bcm2835_drvdata = {
> + .cache_line_size = 32,
> +};
> +
> +static struct vchiq_drvdata bcm2836_drvdata = {
> + .cache_line_size = 64,
> +};
Those two structures could probably be marked const. Other than that,
the approach definitively looks good to me.
--
Florian
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