Some preprocessor definitions are using a custom implementation of BIT macro. Just use linux kernel BIT macro instead. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx> --- drivers/staging/mt7621-pci/pci-mt7621.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c index 28d8fbb..8a4785b 100644 --- a/drivers/staging/mt7621-pci/pci-mt7621.c +++ b/drivers/staging/mt7621-pci/pci-mt7621.c @@ -39,6 +39,7 @@ ************************************************************************** */ +#include <linux/bitops.h> #include <linux/types.h> #include <linux/pci.h> #include <linux/kernel.h> @@ -65,15 +66,15 @@ * devices. */ -#define RALINK_PCIE0_CLK_EN (1<<24) -#define RALINK_PCIE1_CLK_EN (1<<25) -#define RALINK_PCIE2_CLK_EN (1<<26) +#define RALINK_PCIE0_CLK_EN BIT(24) +#define RALINK_PCIE1_CLK_EN BIT(25) +#define RALINK_PCIE2_CLK_EN BIT(26) #define RALINK_PCI_CONFIG_ADDR 0x20 #define RALINK_PCI_CONFIG_DATA_VIRTUAL_REG 0x24 -#define RALINK_PCIE0_RST (1<<24) -#define RALINK_PCIE1_RST (1<<25) -#define RALINK_PCIE2_RST (1<<26) +#define RALINK_PCIE0_RST BIT(24) +#define RALINK_PCIE1_RST BIT(25) +#define RALINK_PCIE2_RST BIT(26) #define RALINK_PCI_PCICFG_ADDR 0x0000 #define RALINK_PCI_PCIMSK_ADDR 0x000C @@ -113,11 +114,11 @@ #define RALINK_PCIE_CLK_GEN 0x7c #define RALINK_PCIE_CLK_GEN1 0x80 //RALINK_RSTCTRL bit -#define RALINK_PCIE_RST (1<<23) -#define RALINK_PCI_RST (1<<24) +#define RALINK_PCIE_RST BIT(23) +#define RALINK_PCI_RST BIT(24) //RALINK_CLKCFG1 bit -#define RALINK_PCI_CLK_EN (1<<19) -#define RALINK_PCIE_CLK_EN (1<<21) +#define RALINK_PCI_CLK_EN BIT(19) +#define RALINK_PCIE_CLK_EN BIT(21) #define MEMORY_BASE 0x0 static int pcie_link_status = 0; -- 2.7.4 _______________________________________________ devel mailing list devel@xxxxxxxxxxxxxxxxxxxxxx http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
