Hi James, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on staging/staging-testing] [also build test WARNING on v4.17-rc3 next-20180504] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/James-Kelly/staging-clocking-wizard-Implement-many-TODOs/20180507-102148 config: x86_64-randconfig-x009-201818 (attached as .config) compiler: gcc-7 (Debian 7.3.0-16) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 Note: it may well be a FALSE warning. FWIW you are at least aware of it now. http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings All warnings (new ones prefixed by >>): drivers/staging//clocking-wizard/clk-xlnx-clock-wizard.c: In function 'clk_wzrd_register_clk.constprop': >> drivers/staging//clocking-wizard/clk-xlnx-clock-wizard.c:493:21: warning: 'frac_reg_field' may be used uninitialized in this function [-Wmaybe-uninitialized] cwc->frac_field = devm_regmap_field_alloc(dev, cw->regmap, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ *frac_reg_field); ~~~~~~~~~~~~~~~~ vim +/frac_reg_field +493 drivers/staging//clocking-wizard/clk-xlnx-clock-wizard.c 429 430 static int clk_wzrd_register_clk(struct device *dev, const char *name, 431 enum clk_wzrd_clk type, unsigned int instance, 432 unsigned long flags) 433 { 434 int ret; 435 struct clk_init_data init; 436 const struct reg_field *int_reg_field; 437 const struct reg_field *frac_reg_field; 438 struct clk_wzrd_clk_data *cwc; 439 const char *parent_name; 440 struct clk_wzrd *cw = dev_get_drvdata(dev); 441 442 init.ops = &clk_wzrd_clk_ops; 443 init.flags = flags; 444 445 switch (type) { 446 case WZRD_CLK_DIV: 447 cwc = &cw->div_data; 448 int_reg_field = &clk_wzrd_divclk_divide; 449 parent_name = __clk_get_name(cw->clk_in1); 450 break; 451 case WZRD_CLK_PLL: 452 cwc = &cw->pll_data; 453 cwc->flags |= WZRD_FLAG_MULTIPLY; 454 int_reg_field = &clk_wzrd_clkfbout_mult; 455 if (cw->chip->cell % 2 == 0) { 456 frac_reg_field = &clk_wzrd_clkfbout_frac; 457 cwc->flags |= WZRD_FLAG_FRAC; 458 } 459 parent_name = clk_hw_get_name(&cw->div_data.hw); 460 break; 461 case WZRD_CLK_OUT: 462 if (instance >= cw->chip->output_count) { 463 ret = -EINVAL; 464 goto err; 465 } 466 cwc = &cw->clkout_data[instance]; 467 if (instance == 0) { 468 if (cw->chip->cell % 2 == 0) { 469 cwc->flags |= WZRD_FLAG_FRAC; 470 frac_reg_field = &clk_wzrd_clkout0_frac; 471 } 472 } 473 int_reg_field = &clk_wzrd_clkout_divide[instance]; 474 parent_name = clk_hw_get_name(&cw->pll_data.hw); 475 break; 476 default: 477 ret = -EINVAL; 478 goto err; 479 } 480 481 init.name = name; 482 init.parent_names = &parent_name; 483 init.num_parents = 1; 484 cwc->hw.init = &init; 485 cwc->int_field = devm_regmap_field_alloc(dev, cw->regmap, 486 *int_reg_field); 487 if (IS_ERR(cwc->int_field)) { 488 ret = PTR_ERR(cwc->int_field); 489 goto err; 490 } 491 492 if (cwc->flags & WZRD_FLAG_FRAC) { > 493 cwc->frac_field = devm_regmap_field_alloc(dev, cw->regmap, 494 *frac_reg_field); 495 if (IS_ERR(cwc->frac_field)) { 496 ret = PTR_ERR(cwc->frac_field); 497 goto err; 498 } 499 } 500 501 ret = devm_clk_hw_register(dev, &cwc->hw); 502 if (ret) 503 goto err; 504 505 return 0; 506 err: 507 dev_err(dev, "Unable to register component clock %s\n", name); 508 return ret; 509 } 510 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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