[PATCH] staging:mt29f_spinand: MT29F2G failing as only 16 bits used for addressing.

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From: Palle Christensen <palle.christensen@xxxxxxxxxxxxx>

For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
are necessary to address the correct page.

Signed-off-by: Palle Christensen <palle.christensen@xxxxxxxxxxxxx>
---
 drivers/staging/mt29f_spinand/mt29f_spinand.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/staging/mt29f_spinand/mt29f_spinand.c b/drivers/staging/mt29f_spinand/mt29f_spinand.c
index 264ad36..d20284b 100644
--- a/drivers/staging/mt29f_spinand/mt29f_spinand.c
+++ b/drivers/staging/mt29f_spinand/mt29f_spinand.c
@@ -316,6 +316,7 @@ static int spinand_read_page_to_cache(struct spi_device *spi_nand, u16 page_id)
 	row = page_id;
 	cmd.cmd = CMD_READ;
 	cmd.n_addr = 3;
+	cmd.addr[0] = (u8)((row & 0xff0000) >> 16);
 	cmd.addr[1] = (u8)((row & 0xff00) >> 8);
 	cmd.addr[2] = (u8)(row & 0x00ff);
 
@@ -464,6 +465,7 @@ static int spinand_program_execute(struct spi_device *spi_nand, u16 page_id)
 	row = page_id;
 	cmd.cmd = CMD_PROG_PAGE_EXC;
 	cmd.n_addr = 3;
+	cmd.addr[0] = (u8)((row & 0xff0000) >> 16);
 	cmd.addr[1] = (u8)((row & 0xff00) >> 8);
 	cmd.addr[2] = (u8)(row & 0x00ff);
 
@@ -579,6 +581,7 @@ static int spinand_erase_block_erase(struct spi_device *spi_nand, u16 block_id)
 	row = block_id;
 	cmd.cmd = CMD_ERASE_BLK;
 	cmd.n_addr = 3;
+	cmd.addr[0] = (u8)((row & 0xff0000) >> 16);
 	cmd.addr[1] = (u8)((row & 0xff00) >> 8);
 	cmd.addr[2] = (u8)(row & 0x00ff);
 
-- 
1.9.1

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