Replace instances of printk with dev_err where possible. Signed-off-by: Martyn Welch <martyn.welch@xxxxxx> --- drivers/staging/vme/bridges/vme_ca91cx42.c | 95 ++++++++----- drivers/staging/vme/bridges/vme_tsi148.c | 202 ++++++++++++++++------------ 2 files changed, 171 insertions(+), 126 deletions(-) diff --git a/drivers/staging/vme/bridges/vme_ca91cx42.c b/drivers/staging/vme/bridges/vme_ca91cx42.c index 2795ff2..7b4760b 100644 --- a/drivers/staging/vme/bridges/vme_ca91cx42.c +++ b/drivers/staging/vme/bridges/vme_ca91cx42.c @@ -93,31 +93,35 @@ static u32 ca91cx42_IACK_irqhandler(struct ca91cx42_driver *bridge) return CA91CX42_LINT_SW_IACK; } -static u32 ca91cx42_VERR_irqhandler(struct ca91cx42_driver *bridge) +static u32 ca91cx42_VERR_irqhandler(struct vme_bridge *ca91cx42_bridge) { int val; + struct ca91cx42_driver *bridge; + + bridge = ca91cx42_bridge->driver_priv; val = ioread32(bridge->base + DGCS); if (!(val & 0x00000800)) { - printk(KERN_ERR "ca91c042: ca91cx42_VERR_irqhandler DMA Read " - "Error DGCS=%08X\n", val); + dev_err(ca91cx42_bridge->parent, "ca91cx42_VERR_irqhandler DMA " + "Read Error DGCS=%08X\n", val); } return CA91CX42_LINT_VERR; } -static u32 ca91cx42_LERR_irqhandler(struct ca91cx42_driver *bridge) +static u32 ca91cx42_LERR_irqhandler(struct vme_bridge *ca91cx42_bridge) { int val; + struct ca91cx42_driver *bridge; - val = ioread32(bridge->base + DGCS); + bridge = ca91cx42_bridge->driver_priv; - if (!(val & 0x00000800)) { - printk(KERN_ERR "ca91c042: ca91cx42_LERR_irqhandler DMA Read " - "Error DGCS=%08X\n", val); + val = ioread32(bridge->base + DGCS); - } + if (!(val & 0x00000800)) + dev_err(ca91cx42_bridge->parent, "ca91cx42_LERR_irqhandler DMA " + "Read Error DGCS=%08X\n", val); return CA91CX42_LINT_LERR; } @@ -175,9 +179,9 @@ static irqreturn_t ca91cx42_irqhandler(int irq, void *ptr) if (stat & CA91CX42_LINT_SW_IACK) serviced |= ca91cx42_IACK_irqhandler(bridge); if (stat & CA91CX42_LINT_VERR) - serviced |= ca91cx42_VERR_irqhandler(bridge); + serviced |= ca91cx42_VERR_irqhandler(ca91cx42_bridge); if (stat & CA91CX42_LINT_LERR) - serviced |= ca91cx42_LERR_irqhandler(bridge); + serviced |= ca91cx42_LERR_irqhandler(ca91cx42_bridge); if (stat & (CA91CX42_LINT_VIRQ1 | CA91CX42_LINT_VIRQ2 | CA91CX42_LINT_VIRQ3 | CA91CX42_LINT_VIRQ4 | CA91CX42_LINT_VIRQ5 | CA91CX42_LINT_VIRQ6 | @@ -325,9 +329,12 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, unsigned int i, addr = 0, granularity; unsigned int temp_ctl = 0; unsigned int vme_bound, pci_offset; + struct vme_bridge *ca91cx42_bridge; struct ca91cx42_driver *bridge; - bridge = image->parent->driver_priv; + ca91cx42_bridge = image->parent; + + bridge = ca91cx42_bridge->driver_priv; i = image->number; @@ -352,7 +359,7 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, case VME_USER3: case VME_USER4: default: - printk(KERN_ERR "Invalid address space\n"); + dev_err(ca91cx42_bridge->parent, "Invalid address space\n"); return -EINVAL; break; } @@ -370,15 +377,18 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, granularity = 0x10000; if (vme_base & (granularity - 1)) { - printk(KERN_ERR "Invalid VME base alignment\n"); + dev_err(ca91cx42_bridge->parent, "Invalid VME base " + "alignment\n"); return -EINVAL; } if (vme_bound & (granularity - 1)) { - printk(KERN_ERR "Invalid VME bound alignment\n"); + dev_err(ca91cx42_bridge->parent, "Invalid VME bound " + "alignment\n"); return -EINVAL; } if (pci_offset & (granularity - 1)) { - printk(KERN_ERR "Invalid PCI Offset alignment\n"); + dev_err(ca91cx42_bridge->parent, "Invalid PCI Offset " + "alignment\n"); return -EINVAL; } @@ -490,7 +500,7 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, /* Find pci_dev container of dev */ if (ca91cx42_bridge->parent == NULL) { - printk(KERN_ERR "Dev entry NULL\n"); + dev_err(ca91cx42_bridge->parent, "Dev entry NULL\n"); return -EINVAL; } pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, dev); @@ -514,8 +524,8 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, if (image->bus_resource.name == NULL) { image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL); if (image->bus_resource.name == NULL) { - printk(KERN_ERR "Unable to allocate memory for resource" - " name\n"); + dev_err(ca91cx42_bridge->parent, "Unable to allocate " + "memory for resource name\n"); retval = -ENOMEM; goto err_name; } @@ -532,8 +542,8 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, &(image->bus_resource), size, size, PCIBIOS_MIN_MEM, 0, NULL, NULL); if (retval) { - printk(KERN_ERR "Failed to allocate mem resource for " - "window %d size 0x%lx start 0x%lx\n", + dev_err(ca91cx42_bridge->parent, "Failed to allocate mem " + "resource for window %d size 0x%lx start 0x%lx\n", image->number, (unsigned long)size, (unsigned long)image->bus_resource.start); goto err_resource; @@ -542,7 +552,7 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, image->kern_base = ioremap_nocache( image->bus_resource.start, size); if (image->kern_base == NULL) { - printk(KERN_ERR "Failed to remap resource\n"); + dev_err(ca91cx42_bridge->parent, "Failed to remap resource\n"); retval = -ENOMEM; goto err_remap; } @@ -581,9 +591,12 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, unsigned int i, granularity = 0; unsigned int temp_ctl = 0; unsigned long long pci_bound, vme_offset, pci_base; + struct vme_bridge *ca91cx42_bridge; struct ca91cx42_driver *bridge; - bridge = image->parent->driver_priv; + ca91cx42_bridge = image->parent; + + bridge = ca91cx42_bridge->driver_priv; i = image->number; @@ -594,12 +607,14 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, /* Verify input data */ if (vme_base & (granularity - 1)) { - printk(KERN_ERR "Invalid VME Window alignment\n"); + dev_err(ca91cx42_bridge->parent, "Invalid VME Window " + "alignment\n"); retval = -EINVAL; goto err_window; } if (size & (granularity - 1)) { - printk(KERN_ERR "Invalid VME Window alignment\n"); + dev_err(ca91cx42_bridge->parent, "Invalid VME Window " + "alignment\n"); retval = -EINVAL; goto err_window; } @@ -613,8 +628,8 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, retval = ca91cx42_alloc_resource(image, size); if (retval) { spin_unlock(&(image->lock)); - printk(KERN_ERR "Unable to allocate memory for resource " - "name\n"); + dev_err(ca91cx42_bridge->parent, "Unable to allocate memory " + "for resource name\n"); retval = -ENOMEM; goto err_res; } @@ -657,7 +672,7 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, break; default: spin_unlock(&(image->lock)); - printk(KERN_ERR "Invalid data width\n"); + dev_err(ca91cx42_bridge->parent, "Invalid data width\n"); retval = -EINVAL; goto err_dwidth; break; @@ -689,7 +704,7 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, case VME_USER4: default: spin_unlock(&(image->lock)); - printk(KERN_ERR "Invalid address space\n"); + dev_err(ca91cx42_bridge->parent, "Invalid address space\n"); retval = -EINVAL; goto err_aspace; break; @@ -920,12 +935,15 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, struct vme_dma_vme *vme_attr; dma_addr_t desc_ptr; int retval = 0; + struct device *dev; + + dev = list->parent->parent->parent; /* XXX descriptor must be aligned on 64-bit boundaries */ entry = (struct ca91cx42_dma_entry *) kmalloc(sizeof(struct ca91cx42_dma_entry), GFP_KERNEL); if (entry == NULL) { - printk(KERN_ERR "Failed to allocate memory for dma resource " + dev_err(dev, "Failed to allocate memory for dma resource " "structure\n"); retval = -ENOMEM; goto err_mem; @@ -933,7 +951,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, /* Test descriptor alignment */ if ((unsigned long)&(entry->descriptor) & CA91CX42_DCPP_M) { - printk("Descriptor not aligned to 16 byte boundary as " + dev_err(dev, "Descriptor not aligned to 16 byte boundary as " "required: %p\n", &(entry->descriptor)); retval = -EINVAL; goto err_align; @@ -954,7 +972,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, if ((vme_attr->aspace & ~(VME_A16 | VME_A24 | VME_A32 | VME_USER1 | VME_USER2)) != 0) { - printk(KERN_ERR "Unsupported cycle type\n"); + dev_err(dev, "Unsupported cycle type\n"); retval = -EINVAL; goto err_aspace; } @@ -962,7 +980,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, if ((vme_attr->cycle & ~(VME_SCT | VME_BLT | VME_SUPER | VME_USER | VME_PROG | VME_DATA)) != 0) { - printk(KERN_ERR "Unsupported cycle type\n"); + dev_err(dev, "Unsupported cycle type\n"); retval = -EINVAL; goto err_cycle; } @@ -971,7 +989,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, if (!(((src->type == VME_DMA_PCI) && (dest->type == VME_DMA_VME)) || ((src->type == VME_DMA_VME) && (dest->type == VME_DMA_PCI)))) { - printk(KERN_ERR "Cannot perform transfer with this " + dev_err(dev, "Cannot perform transfer with this " "source-destination combination\n"); retval = -EINVAL; goto err_direct; @@ -996,7 +1014,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D64; break; default: - printk(KERN_ERR "Invalid data width\n"); + dev_err(dev, "Invalid data width\n"); return -EINVAL; } @@ -1018,7 +1036,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER2; break; default: - printk(KERN_ERR "Invalid address space\n"); + dev_err(dev, "Invalid address space\n"); return -EINVAL; break; } @@ -1078,12 +1096,13 @@ int ca91cx42_dma_list_exec(struct vme_dma_list *list) int retval = 0; dma_addr_t bus_addr; u32 val; - + struct device *dev; struct ca91cx42_driver *bridge; ctrlr = list->parent; bridge = ctrlr->parent->driver_priv; + dev = ctrlr->parent->parent; mutex_lock(&(ctrlr->mtx)); @@ -1139,7 +1158,7 @@ int ca91cx42_dma_list_exec(struct vme_dma_list *list) if (val & (CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR | CA91CX42_DGCS_PERR)) { - printk(KERN_ERR "ca91c042: DMA Error. DGCS=%08X\n", val); + dev_err(dev, "ca91c042: DMA Error. DGCS=%08X\n", val); val = ioread32(bridge->base + DCTL); } diff --git a/drivers/staging/vme/bridges/vme_tsi148.c b/drivers/staging/vme/bridges/vme_tsi148.c index 35cb04b..58784d8 100644 --- a/drivers/staging/vme/bridges/vme_tsi148.c +++ b/drivers/staging/vme/bridges/vme_tsi148.c @@ -136,16 +136,20 @@ static u32 tsi148_LM_irqhandler(struct tsi148_driver *bridge, u32 stat) * * XXX This functionality is not exposed up though API. */ -static u32 tsi148_MB_irqhandler(struct tsi148_driver *bridge, u32 stat) +static u32 tsi148_MB_irqhandler(struct vme_bridge *tsi148_bridge, u32 stat) { int i; u32 val; u32 serviced = 0; + struct tsi148_driver *bridge; + + bridge = tsi148_bridge->driver_priv; for (i = 0; i < 4; i++) { if(stat & TSI148_LCSR_INTS_MBS[i]) { val = ioread32be(bridge->base + TSI148_GCSR_MBOX[i]); - printk("VME Mailbox %d received: 0x%x\n", i, val); + dev_err(tsi148_bridge->parent, "VME Mailbox %d received" + ": 0x%x\n", i, val); serviced |= TSI148_LCSR_INTC_MBC[i]; } } @@ -156,19 +160,22 @@ static u32 tsi148_MB_irqhandler(struct tsi148_driver *bridge, u32 stat) /* * Display error & status message when PERR (PCI) exception interrupt occurs. */ -static u32 tsi148_PERR_irqhandler(struct tsi148_driver *bridge) +static u32 tsi148_PERR_irqhandler(struct vme_bridge *tsi148_bridge) { - printk(KERN_ERR - "PCI Exception at address: 0x%08x:%08x, attributes: %08x\n", + struct tsi148_driver *bridge; + + bridge = tsi148_bridge->driver_priv; + + dev_err(tsi148_bridge->parent, "PCI Exception at address: 0x%08x:%08x, " + "attributes: %08x\n", ioread32be(bridge->base + TSI148_LCSR_EDPAU), ioread32be(bridge->base + TSI148_LCSR_EDPAL), - ioread32be(bridge->base + TSI148_LCSR_EDPAT) - ); - printk(KERN_ERR - "PCI-X attribute reg: %08x, PCI-X split completion reg: %08x\n", + ioread32be(bridge->base + TSI148_LCSR_EDPAT)); + + dev_err(tsi148_bridge->parent, "PCI-X attribute reg: %08x, PCI-X split " + "completion reg: %08x\n", ioread32be(bridge->base + TSI148_LCSR_EDPXA), - ioread32be(bridge->base + TSI148_LCSR_EDPXS) - ); + ioread32be(bridge->base + TSI148_LCSR_EDPXS)); iowrite32be(TSI148_LCSR_EDPAT_EDPCL, bridge->base + TSI148_LCSR_EDPAT); @@ -196,7 +203,8 @@ static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge) /* Check for exception register overflow (we have lost error data) */ if(error_attrib & TSI148_LCSR_VEAT_VEOF) { - printk(KERN_ERR "VME Bus Exception Overflow Occurred\n"); + dev_err(tsi148_bridge->parent, "VME Bus Exception Overflow " + "Occurred\n"); } error = (struct vme_bus_error *)kmalloc(sizeof (struct vme_bus_error), @@ -206,11 +214,10 @@ static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge) error->attributes = error_attrib; list_add_tail(&(error->list), &(tsi148_bridge->vme_errors)); } else { - printk(KERN_ERR - "Unable to alloc memory for VMEbus Error reporting\n"); - printk(KERN_ERR - "VME Bus Error at address: 0x%llx, attributes: %08x\n", - error_addr, error_attrib); + dev_err(tsi148_bridge->parent, "Unable to alloc memory for " + "VMEbus Error reporting\n"); + dev_err(tsi148_bridge->parent, "VME Bus Error at address: " + "0x%llx, attributes: %08x\n", error_addr, error_attrib); } /* Clear Status */ @@ -297,11 +304,11 @@ static irqreturn_t tsi148_irqhandler(int irq, void *ptr) /* Mail box irqs */ if (stat & (TSI148_LCSR_INTS_MB3S | TSI148_LCSR_INTS_MB2S | TSI148_LCSR_INTS_MB1S | TSI148_LCSR_INTS_MB0S)) - serviced |= tsi148_MB_irqhandler(bridge, stat); + serviced |= tsi148_MB_irqhandler(tsi148_bridge, stat); /* PCI bus error */ if (stat & TSI148_LCSR_INTS_PERRS) - serviced |= tsi148_PERR_irqhandler(bridge); + serviced |= tsi148_PERR_irqhandler(tsi148_bridge); /* VME bus error */ if (stat & TSI148_LCSR_INTS_VERRS) @@ -345,8 +352,8 @@ static int tsi148_irq_init(struct vme_bridge *tsi148_bridge) IRQF_SHARED, driver_name, tsi148_bridge); if (result) { - dev_err(&pdev->dev, "Can't get assigned pci irq vector %02X\n", - pdev->irq); + dev_err(tsi148_bridge->parent, "Can't get assigned pci irq " + "vector %02X\n", pdev->irq); return result; } @@ -567,9 +574,11 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled, unsigned int vme_bound_low, vme_bound_high; unsigned int pci_offset_low, pci_offset_high; unsigned long long vme_bound, pci_offset; + struct vme_bridge *tsi148_bridge; struct tsi148_driver *bridge; - bridge = image->parent->driver_priv; + tsi148_bridge = image->parent; + bridge = tsi148_bridge->driver_priv; i = image->number; @@ -596,7 +605,7 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled, case VME_USER3: case VME_USER4: default: - printk("Invalid address space\n"); + dev_err(tsi148_bridge->parent, "Invalid address space\n"); return -EINVAL; break; } @@ -614,15 +623,16 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled, reg_split(pci_offset, &pci_offset_high, &pci_offset_low); if (vme_base_low & (granularity - 1)) { - printk("Invalid VME base alignment\n"); + dev_err(tsi148_bridge->parent, "Invalid VME base alignment\n"); return -EINVAL; } if (vme_bound_low & (granularity - 1)) { - printk("Invalid VME bound alignment\n"); + dev_err(tsi148_bridge->parent, "Invalid VME bound alignment\n"); return -EINVAL; } if (pci_offset_low & (granularity - 1)) { - printk("Invalid PCI Offset alignment\n"); + dev_err(tsi148_bridge->parent, "Invalid PCI Offset " + "alignment\n"); return -EINVAL; } @@ -814,12 +824,7 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, tsi148_bridge = image->parent; - /* Find pci_dev container of dev */ - if (tsi148_bridge->parent == NULL) { - printk("Dev entry NULL\n"); - return -EINVAL; - } - pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev); + pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev); existing_size = (unsigned long long)(image->bus_resource.end - image->bus_resource.start); @@ -845,8 +850,8 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, if (image->bus_resource.name == NULL) { image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL); if (image->bus_resource.name == NULL) { - printk(KERN_ERR "Unable to allocate memory for resource" - " name\n"); + dev_err(tsi148_bridge->parent, "Unable to allocate " + "memory for resource name\n"); retval = -ENOMEM; goto err_name; } @@ -863,8 +868,8 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, &(image->bus_resource), size, size, PCIBIOS_MIN_MEM, 0, NULL, NULL); if (retval) { - printk(KERN_ERR "Failed to allocate mem resource for " - "window %d size 0x%lx start 0x%lx\n", + dev_err(tsi148_bridge->parent, "Failed to allocate mem " + "resource for window %d size 0x%lx start 0x%lx\n", image->number, (unsigned long)size, (unsigned long)image->bus_resource.start); goto err_resource; @@ -873,7 +878,7 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, image->kern_base = ioremap_nocache( image->bus_resource.start, size); if (image->kern_base == NULL) { - printk(KERN_ERR "Failed to remap resource\n"); + dev_err(tsi148_bridge->parent, "Failed to remap resource\n"); retval = -ENOMEM; goto err_remap; } @@ -917,19 +922,24 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, unsigned int pci_bound_low, pci_bound_high; unsigned int vme_offset_low, vme_offset_high; unsigned long long pci_bound, vme_offset, pci_base; + struct vme_bridge *tsi148_bridge; struct tsi148_driver *bridge; - bridge = image->parent->driver_priv; + tsi148_bridge = image->parent; + + bridge = tsi148_bridge->driver_priv; /* Verify input data */ if (vme_base & 0xFFFF) { - printk(KERN_ERR "Invalid VME Window alignment\n"); + dev_err(tsi148_bridge->parent, "Invalid VME Window " + "alignment\n"); retval = -EINVAL; goto err_window; } if ((size == 0) && (enabled != 0)) { - printk(KERN_ERR "Size must be non-zero for enabled windows\n"); + dev_err(tsi148_bridge->parent, "Size must be non-zero for " + "enabled windows\n"); retval = -EINVAL; goto err_window; } @@ -943,7 +953,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, retval = tsi148_alloc_resource(image, size); if (retval) { spin_unlock(&(image->lock)); - printk(KERN_ERR "Unable to allocate memory for " + dev_err(tsi148_bridge->parent, "Unable to allocate memory for " "resource\n"); goto err_res; } @@ -970,19 +980,20 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, if (pci_base_low & 0xFFFF) { spin_unlock(&(image->lock)); - printk(KERN_ERR "Invalid PCI base alignment\n"); + dev_err(tsi148_bridge->parent, "Invalid PCI base alignment\n"); retval = -EINVAL; goto err_gran; } if (pci_bound_low & 0xFFFF) { spin_unlock(&(image->lock)); - printk(KERN_ERR "Invalid PCI bound alignment\n"); + dev_err(tsi148_bridge->parent, "Invalid PCI bound alignment\n"); retval = -EINVAL; goto err_gran; } if (vme_offset_low & 0xFFFF) { spin_unlock(&(image->lock)); - printk(KERN_ERR "Invalid VME Offset alignment\n"); + dev_err(tsi148_bridge->parent, "Invalid VME Offset " + "alignment\n"); retval = -EINVAL; goto err_gran; } @@ -1028,8 +1039,8 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, temp_ctl |= TSI148_LCSR_OTAT_TM_2eSST; } if (cycle & VME_2eSSTB) { - printk(KERN_WARNING "Currently not setting Broadcast Select " - "Registers\n"); + dev_warn(tsi148_bridge->parent, "Currently not setting " + "Broadcast Select Registers\n"); temp_ctl &= ~TSI148_LCSR_OTAT_TM_M; temp_ctl |= TSI148_LCSR_OTAT_TM_2eSSTB; } @@ -1045,7 +1056,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, break; default: spin_unlock(&(image->lock)); - printk(KERN_ERR "Invalid data width\n"); + dev_err(tsi148_bridge->parent, "Invalid data width\n"); retval = -EINVAL; goto err_dwidth; } @@ -1082,7 +1093,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, break; default: spin_unlock(&(image->lock)); - printk(KERN_ERR "Invalid address space\n"); + dev_err(tsi148_bridge->parent, "Invalid address space\n"); retval = -EINVAL; goto err_aspace; break; @@ -1352,8 +1363,8 @@ ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf, vme_err = tsi148_find_error(tsi148_bridge, aspace, vme_base + offset, count); if(vme_err != NULL) { - printk("First VME write error detected an at address 0x%llx\n", - vme_err->address); + dev_warn(tsi148_bridge->parent, "First VME write error detected" + " an at address 0x%llx\n", vme_err->address); retval = vme_err->address - (vme_base + offset); /* Clear down save errors in this address range */ tsi148_clear_errors(tsi148_bridge, aspace, vme_base + offset, @@ -1427,8 +1438,8 @@ unsigned int tsi148_master_rmw(struct vme_master_resource *image, return result; } -static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace, - vme_cycle_t cycle, vme_width_t dwidth) +static int tsi148_dma_set_vme_src_attributes(struct device *dev, u32 *attr, + vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) { /* Setup 2eSST speeds */ switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { @@ -1460,7 +1471,8 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace, *attr |= TSI148_LCSR_DSAT_TM_2eSST; } if (cycle & VME_2eSSTB) { - printk("Currently not setting Broadcast Select Registers\n"); + dev_err(dev, "Currently not setting Broadcast Select " + "Registers\n"); *attr |= TSI148_LCSR_DSAT_TM_2eSSTB; } @@ -1473,7 +1485,7 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace, *attr |= TSI148_LCSR_DSAT_DBW_32; break; default: - printk("Invalid data width\n"); + dev_err(dev, "Invalid data width\n"); return -EINVAL; } @@ -1507,7 +1519,7 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace, *attr |= TSI148_LCSR_DSAT_AMODE_USER4; break; default: - printk("Invalid address space\n"); + dev_err(dev, "Invalid address space\n"); return -EINVAL; break; } @@ -1520,8 +1532,8 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace, return 0; } -static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace, - vme_cycle_t cycle, vme_width_t dwidth) +static int tsi148_dma_set_vme_dest_attributes(struct device *dev, u32 *attr, + vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) { /* Setup 2eSST speeds */ switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { @@ -1553,7 +1565,8 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace, *attr |= TSI148_LCSR_DDAT_TM_2eSST; } if (cycle & VME_2eSSTB) { - printk("Currently not setting Broadcast Select Registers\n"); + dev_err(dev, "Currently not setting Broadcast Select " + "Registers\n"); *attr |= TSI148_LCSR_DDAT_TM_2eSSTB; } @@ -1566,7 +1579,7 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace, *attr |= TSI148_LCSR_DDAT_DBW_32; break; default: - printk("Invalid data width\n"); + dev_err(dev, "Invalid data width\n"); return -EINVAL; } @@ -1600,7 +1613,7 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace, *attr |= TSI148_LCSR_DDAT_AMODE_USER4; break; default: - printk("Invalid address space\n"); + dev_err(dev, "Invalid address space\n"); return -EINVAL; break; } @@ -1626,21 +1639,25 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src, struct vme_dma_vme *vme_attr; dma_addr_t desc_ptr; int retval = 0; + struct vme_bridge *tsi148_bridge; + + tsi148_bridge = list->parent->parent; /* Descriptor must be aligned on 64-bit boundaries */ entry = (struct tsi148_dma_entry *)kmalloc( sizeof(struct tsi148_dma_entry), GFP_KERNEL); if (entry == NULL) { - printk("Failed to allocate memory for dma resource " - "structure\n"); + dev_err(tsi148_bridge->parent, "Failed to allocate memory for " + "dma resource structure\n"); retval = -ENOMEM; goto err_mem; } /* Test descriptor alignment */ if ((unsigned long)&(entry->descriptor) & 0x7) { - printk("Descriptor not aligned to 8 byte boundary as " - "required: %p\n", &(entry->descriptor)); + dev_err(tsi148_bridge->parent, "Descriptor not aligned to 8 " + "byte boundary as required: %p\n", + &(entry->descriptor)); retval = -EINVAL; goto err_align; } @@ -1685,13 +1702,13 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src, entry->descriptor.dsat = TSI148_LCSR_DSAT_TYP_VME; retval = tsi148_dma_set_vme_src_attributes( - &(entry->descriptor.dsat), vme_attr->aspace, - vme_attr->cycle, vme_attr->dwidth); + tsi148_bridge->parent, &(entry->descriptor.dsat), + vme_attr->aspace, vme_attr->cycle, vme_attr->dwidth); if(retval < 0 ) goto err_source; break; default: - printk("Invalid source type\n"); + dev_err(tsi148_bridge->parent, "Invalid source type\n"); retval = -EINVAL; goto err_source; break; @@ -1723,13 +1740,13 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src, entry->descriptor.ddat = TSI148_LCSR_DDAT_TYP_VME; retval = tsi148_dma_set_vme_dest_attributes( - &(entry->descriptor.ddat), vme_attr->aspace, - vme_attr->cycle, vme_attr->dwidth); + tsi148_bridge->parent, &(entry->descriptor.ddat), + vme_attr->aspace, vme_attr->cycle, vme_attr->dwidth); if(retval < 0 ) goto err_dest; break; default: - printk("Invalid destination type\n"); + dev_err(tsi148_bridge->parent, "Invalid destination type\n"); retval = -EINVAL; goto err_dest; break; @@ -1794,11 +1811,14 @@ int tsi148_dma_list_exec(struct vme_dma_list *list) dma_addr_t bus_addr; u32 bus_addr_high, bus_addr_low; u32 val, dctlreg = 0; + struct vme_bridge *tsi148_bridge; struct tsi148_driver *bridge; ctrlr = list->parent; - bridge = ctrlr->parent->driver_priv; + tsi148_bridge = ctrlr->parent; + + bridge = tsi148_bridge->driver_priv; mutex_lock(&(ctrlr->mtx)); @@ -1846,7 +1866,7 @@ int tsi148_dma_list_exec(struct vme_dma_list *list) TSI148_LCSR_OFFSET_DSTA); if (val & TSI148_LCSR_DSTA_VBE) { - printk(KERN_ERR "tsi148: DMA Error. DSTA=%08X\n", val); + dev_err(tsi148_bridge->parent, "DMA Error. DSTA=%08X\n", val); retval = -EIO; } @@ -1890,9 +1910,12 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, { u32 lm_base_high, lm_base_low, lm_ctl = 0; int i; + struct vme_bridge *tsi148_bridge; struct tsi148_driver *bridge; - bridge = lm->parent->driver_priv; + tsi148_bridge = lm->parent; + + bridge = tsi148_bridge->driver_priv; mutex_lock(&(lm->mtx)); @@ -1900,8 +1923,8 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, for (i = 0; i < lm->monitors; i++) { if (bridge->lm_callback[i] != NULL) { mutex_unlock(&(lm->mtx)); - printk("Location monitor callback attached, can't " - "reset\n"); + dev_err(tsi148_bridge->parent, "Location monitor " + "callback attached, can't reset\n"); return -EBUSY; } } @@ -1921,7 +1944,7 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, break; default: mutex_unlock(&(lm->mtx)); - printk("Invalid address space\n"); + dev_err(tsi148_bridge->parent, "Invalid address space\n"); return -EINVAL; break; } @@ -2004,9 +2027,12 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor, void (*callback)(int)) { u32 lm_ctl, tmp; + struct vme_bridge *tsi148_bridge; struct tsi148_driver *bridge; - bridge = lm->parent->driver_priv; + tsi148_bridge = lm->parent; + + bridge = tsi148_bridge->driver_priv; mutex_lock(&(lm->mtx)); @@ -2014,14 +2040,15 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor, lm_ctl = ioread32be(bridge->base + TSI148_LCSR_LMAT); if ((lm_ctl & (TSI148_LCSR_LMAT_PGM | TSI148_LCSR_LMAT_DATA)) == 0) { mutex_unlock(&(lm->mtx)); - printk("Location monitor not properly configured\n"); + dev_err(tsi148_bridge->parent, "Location monitor not properly " + "configured\n"); return -EINVAL; } /* Check that a callback isn't already attached */ if (bridge->lm_callback[monitor] != NULL) { mutex_unlock(&(lm->mtx)); - printk("Existing callback attached\n"); + dev_err(tsi148_bridge->parent, "Existing callback attached\n"); return -EBUSY; } @@ -2138,8 +2165,8 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge, bridge->crcsr_kernel = pci_alloc_consistent(pdev, VME_CRCSR_BUF_SIZE, &(bridge->crcsr_bus)); if (bridge->crcsr_kernel == NULL) { - dev_err(&pdev->dev, "Failed to allocate memory for CR/CSR " - "image\n"); + dev_err(tsi148_bridge->parent, "Failed to allocate memory for " + "CR/CSR image\n"); return -ENOMEM; } @@ -2158,18 +2185,18 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge, if (cbar != vstat) { cbar = vstat; - dev_info(&pdev->dev, "Setting CR/CSR offset\n"); + dev_info(tsi148_bridge->parent, "Setting CR/CSR offset\n"); iowrite32be(cbar<<3, bridge->base + TSI148_CBAR); } - dev_info(&pdev->dev, "CR/CSR Offset: %d\n", cbar); + dev_info(tsi148_bridge->parent, "CR/CSR Offset: %d\n", cbar); crat = ioread32be(bridge->base + TSI148_LCSR_CRAT); if (crat & TSI148_LCSR_CRAT_EN) { - dev_info(&pdev->dev, "Enabling CR/CSR space\n"); + dev_info(tsi148_bridge->parent, "Enabling CR/CSR space\n"); iowrite32be(crat | TSI148_LCSR_CRAT_EN, bridge->base + TSI148_LCSR_CRAT); } else - dev_info(&pdev->dev, "CR/CSR already enabled\n"); + dev_info(tsi148_bridge->parent, "CR/CSR already enabled\n"); /* If we want flushed, error-checked writes, set up a window * over the CR/CSR registers. We read from here to safely flush @@ -2180,7 +2207,8 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge, (vstat * 0x80000), 0x80000, VME_CRCSR, VME_SCT, VME_D16); if (retval) - dev_err(&pdev->dev, "Configuring flush image failed\n"); + dev_err(tsi148_bridge->parent, "Configuring flush image" + " failed\n"); } return 0; @@ -2623,8 +2651,6 @@ static void tsi148_remove(struct pci_dev *pdev) static void __exit tsi148_exit(void) { pci_unregister_driver(&tsi148_driver); - - printk(KERN_DEBUG "Driver removed.\n"); } MODULE_PARM_DESC(err_chk, "Check for VME errors on reads and writes"); -- Martyn Welch (Principal Software Engineer) | Registered in England and GE Intelligent Platforms | Wales (3828642) at 100 T +44(0)127322748 | Barbirolli Square, Manchester, E martyn.welch@xxxxxx | M2 3AB VAT:GB 927559189 _______________________________________________ devel mailing list devel@xxxxxxxxxxxxxxxxxxxxxx http://driverdev.linuxdriverproject.org/mailman/listinfo/devel