From: root <root@graham-eeepc.(none)> --- drivers/staging/comedi/drivers/ni_670x.c | 18 +++++++++++------- 1 files changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/staging/comedi/drivers/ni_670x.c b/drivers/staging/comedi/drivers/ni_670x.c index 9b43547..fc5f90f 100644 --- a/drivers/staging/comedi/drivers/ni_670x.c +++ b/drivers/staging/comedi/drivers/ni_670x.c @@ -93,7 +93,7 @@ static DEFINE_PCI_DEVICE_TABLE(ni_670x_pci_table) = { { PCI_VENDOR_ID_NATINST, 0x2c90, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { PCI_VENDOR_ID_NATINST, 0x1920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - /* { PCI_VENDOR_ID_NATINST, 0x0000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, */ + /*{ PCI_VENDOR_ID_NATINST, 0x0000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },*/ { 0} }; @@ -207,8 +207,10 @@ static int ni_670x_attach(struct comedi_device *dev, s->insn_bits = ni_670x_dio_insn_bits; s->insn_config = ni_670x_dio_insn_config; - writel(0x10, devpriv->mite->daq_io_addr + MISC_CONTROL_OFFSET); /* Config of misc registers */ - writel(0x00, devpriv->mite->daq_io_addr + AO_CONTROL_OFFSET); /* Config of ao registers */ + /* Config of misc registers */ + writel(0x10, devpriv->mite->daq_io_addr + MISC_CONTROL_OFFSET); + /* Config of ao registers */ + writel(0x00, devpriv->mite->daq_io_addr + AO_CONTROL_OFFSET); printk("attached\n"); @@ -219,9 +221,9 @@ static int ni_670x_detach(struct comedi_device *dev) { printk("comedi%d: ni_670x: remove\n", dev->minor); - if (dev->subdevices[0].range_table_list) { + if (dev->subdevices[0].range_table_list) kfree(dev->subdevices[0].range_table_list); - } + if (dev->private && devpriv->mite) mite_unsetup(devpriv->mite); @@ -250,8 +252,10 @@ static int ni_670x_ao_winsn(struct comedi_device *dev, vch(15) : 30 | ich(31) : 31 */ for (i = 0; i < insn->n; i++) { - writel(((chan & 15) << 1) | ((chan & 16) >> 4), devpriv->mite->daq_io_addr + AO_CHAN_OFFSET); /* First write in channel register which channel to use */ - writel(data[i], devpriv->mite->daq_io_addr + AO_VALUE_OFFSET); /* write channel value */ + /* First write in channel register which channel to use */ + writel(((chan & 15) << 1) | ((chan & 16) >> 4), devpriv->mite->daq_io_addr + AO_CHAN_OFFSET); + /* write channel value */ + writel(data[i], devpriv->mite->daq_io_addr + AO_VALUE_OFFSET); devpriv->ao_readback[chan] = data[i]; } -- 1.6.3.3 _______________________________________________ devel mailing list devel@xxxxxxxxxxxxxxxxxxxxxx http://driverdev.linuxdriverproject.org/mailman/listinfo/devel