Signed-off-by: Joe Perches <joe@xxxxxxxxxxx> --- drivers/staging/poch/poch.c | 72 +++++++++++++++++++++--------------------- 1 files changed, 36 insertions(+), 36 deletions(-) diff --git a/drivers/staging/poch/poch.c b/drivers/staging/poch/poch.c index 0d111dd..59684d1 100644 --- a/drivers/staging/poch/poch.c +++ b/drivers/staging/poch/poch.c @@ -392,8 +392,8 @@ static int poch_channel_alloc_groups(struct channel_info *channel) group->user_offset = (header_pages + (i * group_pages)) * PAGE_SIZE; - printk(KERN_INFO PFX "%ld: user_offset: 0x%lx\n", i, - group->user_offset); + pr_info(PFX "%ld: user_offset: 0x%lx\n", i, + group->user_offset); } return 0; @@ -406,26 +406,26 @@ static int channel_latch_attr(struct channel_info *channel) channel->block_size = atomic_read(&channel->sys_block_size); if (channel->group_count == 0) { - printk(KERN_ERR PFX "invalid group count %lu", + pr_err(PFX "invalid group count %lu", channel->group_count); return -EINVAL; } if (channel->group_size == 0 || channel->group_size < channel->block_size) { - printk(KERN_ERR PFX "invalid group size %lu", + pr_err(PFX "invalid group size %lu", channel->group_size); return -EINVAL; } if (channel->block_size == 0 || (channel->block_size % 8) != 0) { - printk(KERN_ERR PFX "invalid block size %lu", + pr_err(PFX "invalid block size %lu", channel->block_size); return -EINVAL; } if (channel->group_size % channel->block_size != 0) { - printk(KERN_ERR PFX + pr_err(PFX "group size should be multiple of block size"); return -EINVAL; } @@ -466,7 +466,7 @@ static void channel_dma_init(struct channel_info *channel) curr_pci_reg = FPGA_TX_CURR_PCI_REG; } - printk(KERN_WARNING "block_size, group_size, group_count\n"); + pr_warning("block_size, group_size, group_count\n"); /* * Block size is represented in no. of 64 bit transfers. */ @@ -505,8 +505,8 @@ static void channel_dma_init(struct channel_info *channel) spin_lock(channel->iomem_lock); iowrite32(page, fpga + FPGA_DMA_ADR_PAGE_REG); - printk(KERN_INFO PFX "%ld: read dma_addr: 0x%x\n", i, - ioread32(fpga + group_reg)); + pr_info(PFX "%ld: read dma_addr: 0x%x\n", i, + ioread32(fpga + group_reg)); spin_unlock(channel->iomem_lock); } @@ -577,7 +577,7 @@ static int poch_channel_init(struct channel_info *channel, unsigned long alloc_size; int ret; - printk(KERN_WARNING "channel_latch_attr\n"); + pr_warning("channel_latch_attr\n"); ret = channel_latch_attr(channel); if (ret != 0) @@ -594,7 +594,7 @@ static int poch_channel_init(struct channel_info *channel, goto out; } - printk(KERN_WARNING "poch_channel_alloc_groups\n"); + pr_warning("poch_channel_alloc_groups\n"); ret = poch_channel_alloc_groups(channel); if (ret) { @@ -616,7 +616,7 @@ static int poch_channel_init(struct channel_info *channel, __poch_channel_clear_counters(channel); - printk(KERN_WARNING "poch_channel_init_header\n"); + pr_warning("poch_channel_init_header\n"); poch_channel_init_header(channel); @@ -638,9 +638,9 @@ static int poch_wait_fpga_prog(void __iomem *bridge) const unsigned long prog_timeo = 10000; /* 10 Seconds */ u32 card_power; - printk(KERN_WARNING "poch_wait_fpg_prog\n"); + pr_warning("poch_wait_fpg_prog\n"); - printk(KERN_INFO PFX "programming fpga ...\n"); + pr_info(PFX "programming fpga ...\n"); total_wait = 0; while (1) { msleep(wait_period); @@ -648,11 +648,11 @@ static int poch_wait_fpga_prog(void __iomem *bridge) card_power = ioread32(bridge + BRIDGE_CARD_POWER_REG); if (card_power & BRIDGE_CARD_POWER_PROG_DONE) { - printk(KERN_INFO PFX "programming done\n"); + pr_info(PFX "programming done\n"); return 0; } if (total_wait > prog_timeo) { - printk(KERN_ERR PFX + pr_err(PFX "timed out while programming FPGA\n"); return -EIO; } @@ -760,7 +760,7 @@ static int poch_open(struct inode *inode, struct file *filp) usage = atomic_inc_return(&poch_dev->usage); - printk(KERN_WARNING "poch_card_power_on\n"); + pr_warning("poch_card_power_on\n"); if (usage == 1) { ret = poch_card_power_on(poch_dev); @@ -768,15 +768,15 @@ static int poch_open(struct inode *inode, struct file *filp) goto out_dec_usage; } - printk(KERN_INFO "CardBus Bridge Revision: %x\n", - ioread32(bridge + BRIDGE_REV_REG)); - printk(KERN_INFO "CardBus Interface Revision: %x\n", - ioread32(fpga + FPGA_IFACE_REV_REG)); + pr_info("CardBus Bridge Revision: %x\n", + ioread32(bridge + BRIDGE_REV_REG)); + pr_info("CardBus Interface Revision: %x\n", + ioread32(fpga + FPGA_IFACE_REV_REG)); channel->chno = chno; filp->private_data = channel; - printk(KERN_WARNING "poch_channel_init\n"); + pr_warning("poch_channel_init\n"); ret = poch_channel_init(channel, poch_dev); if (ret) @@ -784,14 +784,14 @@ static int poch_open(struct inode *inode, struct file *filp) poch_channel_analog_on(channel); - printk(KERN_WARNING "channel_dma_init\n"); + pr_warning("channel_dma_init\n"); channel_dma_init(channel); - printk(KERN_WARNING "poch_channel_analog_on\n"); + pr_warning("poch_channel_analog_on\n"); if (usage == 1) { - printk(KERN_WARNING "setting up DMA\n"); + pr_warning("setting up DMA\n"); /* Initialize DMA Controller. */ iowrite32(FPGA_CAP_FIFO_REG, bridge + BRIDGE_STAT_2_REG); @@ -855,7 +855,7 @@ static int poch_release(struct inode *inode, struct file *filp) usage = atomic_dec_return(&poch_dev->usage); if (usage == 0) { - printk(KERN_WARNING "poch_card_power_off\n"); + pr_warning("poch_card_power_off\n"); poch_card_power_off(poch_dev); } @@ -888,10 +888,10 @@ static int poch_mmap(struct file *filp, struct vm_area_struct *vma) int i; int ret; - printk(KERN_WARNING "poch_mmap\n"); + pr_warning("poch_mmap\n"); if (vma->vm_pgoff) { - printk(KERN_WARNING PFX "page offset: %lu\n", vma->vm_pgoff); + pr_warning(PFX "page offset: %lu\n", vma->vm_pgoff); return -EINVAL; } @@ -901,7 +901,7 @@ static int poch_mmap(struct file *filp, struct vm_area_struct *vma) size = vma->vm_end - vma->vm_start; if (size != (header_pages + total_group_pages) * PAGE_SIZE) { - printk(KERN_WARNING PFX "required %lu bytes\n", size); + pr_warning(PFX "required %lu bytes\n", size); return -EINVAL; } @@ -994,7 +994,7 @@ static int poch_ioctl(struct inode *inode, struct file *filp, case POCH_IOC_TRANSFER_START: switch (channel->chno) { case CHNO_TX_CHANNEL: - printk(KERN_INFO PFX "ioctl: Tx start\n"); + pr_info(PFX "ioctl: Tx start\n"); iowrite32(0x1, fpga + FPGA_TX_TRIGGER_REG); iowrite32(0x1, fpga + FPGA_TX_ENABLE_REG); @@ -1004,7 +1004,7 @@ static int poch_ioctl(struct inode *inode, struct file *filp, iowrite32(0x1, bridge + BRIDGE_DMA_GO_REG); break; case CHNO_RX_CHANNEL: - printk(KERN_INFO PFX "ioctl: Rx start\n"); + pr_info(PFX "ioctl: Rx start\n"); iowrite32(0x1, fpga + FPGA_RX_ARM_REG); iowrite32(0x1, bridge + BRIDGE_DMA_GO_REG); break; @@ -1013,13 +1013,13 @@ static int poch_ioctl(struct inode *inode, struct file *filp, case POCH_IOC_TRANSFER_STOP: switch (channel->chno) { case CHNO_TX_CHANNEL: - printk(KERN_INFO PFX "ioctl: Tx stop\n"); + pr_info(PFX "ioctl: Tx stop\n"); iowrite32(0x0, fpga + FPGA_TX_ENABLE_REG); iowrite32(0x0, fpga + FPGA_TX_TRIGGER_REG); iowrite32(0x0, bridge + BRIDGE_DMA_GO_REG); break; case CHNO_RX_CHANNEL: - printk(KERN_INFO PFX "ioctl: Rx stop\n"); + pr_info(PFX "ioctl: Rx stop\n"); iowrite32(0x0, fpga + FPGA_RX_ARM_REG); iowrite32(0x0, bridge + BRIDGE_DMA_GO_REG); break; @@ -1139,7 +1139,7 @@ static irqreturn_t poch_irq_handler(int irq, void *p) channel_tx->counters.pll_unlock++; channel_rx->counters.pll_unlock++; if (printk_ratelimit()) - printk(KERN_WARNING PFX "PLL unlocked\n"); + pr_warning(PFX "PLL unlocked\n"); } if (fpga_stat & FPGA_INT_TX_FF_EMPTY) channel_tx->counters.fifo_empty++; @@ -1423,7 +1423,7 @@ static int __init poch_init_module(void) ret = alloc_chrdev_region(&poch_first_dev, 0, MAX_POCH_DEVICES, DRV_NAME); if (ret) { - printk(KERN_ERR PFX "error allocating device no."); + pr_err(PFX "error allocating device no."); return ret; } @@ -1435,7 +1435,7 @@ static int __init poch_init_module(void) ret = pci_register_driver(&poch_pci_driver); if (ret) { - printk(KERN_ERR PFX "error register PCI device"); + pr_err(PFX "error register PCI device"); goto out_class_destroy; } -- 1.6.5.rc3.dirty _______________________________________________ devel mailing list devel@xxxxxxxxxxxxxxxxxxxxxx http://driverdev.linuxdriverproject.org/mailman/listinfo/devel