On 08/04/2009 12:50 AM, Jiri Slaby wrote:
> On 08/03/2009 11:01 PM, Greg K-H wrote:
>> + down(&(vme_irq));
>> +
>> + tsi148_bridge->irq[level - 1].callback[statid].func = NULL;
>
> What if the interrupt comes now?
On the second though, actually nothing worse than "Spurilous VME
interrupt" (if some arch doesn't reorder func and priv_data
assignments). It's not that bad, but still worth fixing.
> I think you want to switch this block
> with "Disable IRQ level" one. And take care of PCI posting (if it is not
> enough that INTEO reaches the device by a consequent INTEN read).
>
>> + tsi148_bridge->irq[level - 1].callback[statid].priv_data = NULL;
>> + tsi148_bridge->irq[level - 1].count--;
>> +
>> + /* Disable IRQ level */
>> + if (tsi148_bridge->irq[level - 1].count == 0) {
>> + tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_INTEO);
>> + tmp &= ~TSI148_LCSR_INTEO_IRQEO[level - 1];
>> + iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_INTEO);
>> +
>> + tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_INTEN);
>> + tmp &= ~TSI148_LCSR_INTEN_IRQEN[level - 1];
>> + iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_INTEN);
>> + }
>> +
>> + /* Release semaphore */
>> + up(&(vme_irq));
>> +}
>
