On 2021/4/7 18:25, Greg KH wrote: > On Wed, Apr 07, 2021 at 06:03:11PM +0800, Yicong Yang wrote: >> On 2021/4/6 21:49, Greg KH wrote: >>> On Tue, Apr 06, 2021 at 08:45:50PM +0800, Yicong Yang wrote: >>>> HiSilicon PCIe tune and trace device(PTT) is a PCIe Root Complex >>>> integrated Endpoint(RCiEP) device, providing the capability >>>> to dynamically monitor and tune the PCIe traffic(tune), >>>> and trace the TLP headers(trace). The driver exposes the user >>>> interface through debugfs, so no need for extra user space tools. >>>> The usage is described in the document. >>> >>> Why use debugfs and not the existing perf tools for debugging? >>> >> >> The perf doesn't match our device as we've analyzed. >> >> For the tune function it doesn't do the sampling at all. >> User specifys one link parameter and reads its current value or set >> the desired one. The process is static. We didn't find a >> way to adapt to perf. >> >> For the trace function, we may barely adapt to the perf framework >> but it doesn't seems like a better choice. We have our own format >> of data and don't need perf doing the parsing, and we'll get extra >> information added by perf as well. The settings through perf tools >> won't satisfy our needs, we cannot present available settings >> (filter BDF number, TLP types, buffer controls) to >> the user and user cannot set in a friendly way. For example, >> we cannot count on perf to decode the usual format BDF number like >> <domain>:<bus>:<dev>.<fn>, which user can use filter the TLP >> headers. > > Please work with the perf developers to come up with a solution. I find > it hard to believe that your hardware is so different than all the other > hardware that perf currently supports. I would need their agreement > that you can not use perf before accepting this patchset. > Sure. I'll resend this series with more detailed information and with perf list and developers cc'ed to collect more suggestions on this device and driver. Thanks, Yicong
