On Sat, Feb 06, 2021 at 11:08:27PM +0800, Leo Yan wrote: > To get the changes in the commit: > > "coresight: etm-perf: Clarify comment on perf options". > > Signed-off-by: Leo Yan <leo.yan@xxxxxxxxxx> > Reviewed-by: Suzuki K Poulose <suzuki.poulose@xxxxxxx> Reviewed-by: Mathieu Poirier <mathieu.poirier@xxxxxxxxxx> > --- > tools/include/linux/coresight-pmu.h | 17 ++++++++++++----- > 1 file changed, 12 insertions(+), 5 deletions(-) > > diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h > index b0e35eec6499..5dc47cfdcf07 100644 > --- a/tools/include/linux/coresight-pmu.h > +++ b/tools/include/linux/coresight-pmu.h > @@ -10,11 +10,18 @@ > #define CORESIGHT_ETM_PMU_NAME "cs_etm" > #define CORESIGHT_ETM_PMU_SEED 0x10 > > -/* ETMv3.5/PTM's ETMCR config bit */ > -#define ETM_OPT_CYCACC 12 > -#define ETM_OPT_CTXTID 14 > -#define ETM_OPT_TS 28 > -#define ETM_OPT_RETSTK 29 > +/* > + * Below are the definition of bit offsets for perf option, and works as > + * arbitrary values for all ETM versions. > + * > + * Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore, > + * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and > + * directly use below macros as config bits. > + */ > +#define ETM_OPT_CYCACC 12 > +#define ETM_OPT_CTXTID 14 > +#define ETM_OPT_TS 28 > +#define ETM_OPT_RETSTK 29 > > /* ETMv4 CONFIGR programming bits for the ETM OPTs */ > #define ETM4_CFG_BIT_CYCACC 4 > -- > 2.25.1 >
