On 3/2/2020 12:37 PM, Raj, Ashok wrote: >> 1 second is too aggressive. We already have proof that several PCIe >> cards take their time during FLR especially FPGA cards in the orders >> of 10 seconds. > Aren't the rules specified in 7.9.17 Rediness Time Reporting Extended Capability > sufficient to cover this? > Yes, readiness would work too but it is not a mandatory feature. Readiness is yet another alternative to CRS advertised as the new flashy way of doing things. Problem is backwards compatibility. Do you want to break all existing/legacy drivers for an optional/new spec defined feature? > If a device doesn't have them we could let the driver supply this value > as a device specific value to override the default. > >> Current code is waiting up to 60 seconds. If card shows up before that >> we happily return. >> > But in 7.9.17.2 Readiness Time Reporting 1 Register, says devices > can defer reporting by not setting the valid bit, but if it remains > clear after 60s system software can assume no valid values will be reported. > > Maybe keep the system default to something more reasonable (after some > testing in the community), and do this insane 60s for devices that > support the optional reporting capability? I think we should add readiness capability on top of CRS but not exclusively. If readiness is supported, do the spec defined behavior. If not supported, fallback to CRS for legacy devices. I remember Bjorn mentioning about readiness capability. Maybe, this is the time to implement it.
