Em Fri, 26 Apr 2019 23:31:37 +0800
Changbin Du <changbin.du@xxxxxxxxx> escreveu:
> This converts the plain text documentation to reStructuredText format and
> add it to Sphinx TOC tree. No essential content change.
>
> Signed-off-by: Changbin Du <changbin.du@xxxxxxxxx>
Reviewed-by: Mauro Carvalho Chehab <mchehab+samsung@xxxxxxxxxx>
> ---
> ...ory-encryption.txt => amd-memory-encryption.rst} | 13 ++++++++++---
> Documentation/x86/index.rst | 1 +
> 2 files changed, 11 insertions(+), 3 deletions(-)
> rename Documentation/x86/{amd-memory-encryption.txt => amd-memory-encryption.rst} (94%)
>
> diff --git a/Documentation/x86/amd-memory-encryption.txt b/Documentation/x86/amd-memory-encryption.rst
> similarity index 94%
> rename from Documentation/x86/amd-memory-encryption.txt
> rename to Documentation/x86/amd-memory-encryption.rst
> index afc41f544dab..c48d452d0718 100644
> --- a/Documentation/x86/amd-memory-encryption.txt
> +++ b/Documentation/x86/amd-memory-encryption.rst
> @@ -1,3 +1,9 @@
> +.. SPDX-License-Identifier: GPL-2.0
> +
> +=====================
> +AMD Memory Encryption
> +=====================
> +
> Secure Memory Encryption (SME) and Secure Encrypted Virtualization (SEV) are
> features found on AMD processors.
>
> @@ -34,7 +40,7 @@ is operating in 64-bit or 32-bit PAE mode, in all other modes the SEV hardware
> forces the memory encryption bit to 1.
>
> Support for SME and SEV can be determined through the CPUID instruction. The
> -CPUID function 0x8000001f reports information related to SME:
> +CPUID function 0x8000001f reports information related to SME::
>
> 0x8000001f[eax]:
> Bit[0] indicates support for SME
> @@ -48,14 +54,14 @@ CPUID function 0x8000001f reports information related to SME:
> addresses)
>
> If support for SME is present, MSR 0xc00100010 (MSR_K8_SYSCFG) can be used to
> -determine if SME is enabled and/or to enable memory encryption:
> +determine if SME is enabled and/or to enable memory encryption::
>
> 0xc0010010:
> Bit[23] 0 = memory encryption features are disabled
> 1 = memory encryption features are enabled
>
> If SEV is supported, MSR 0xc0010131 (MSR_AMD64_SEV) can be used to determine if
> -SEV is active:
> +SEV is active::
>
> 0xc0010131:
> Bit[0] 0 = memory encryption is not active
> @@ -68,6 +74,7 @@ requirements for the system. If this bit is not set upon Linux startup then
> Linux itself will not set it and memory encryption will not be possible.
>
> The state of SME in the Linux kernel can be documented as follows:
> +
> - Supported:
> The CPU supports SME (determined through CPUID instruction).
>
> diff --git a/Documentation/x86/index.rst b/Documentation/x86/index.rst
> index 20091d3e5d97..a0426ab156bd 100644
> --- a/Documentation/x86/index.rst
> +++ b/Documentation/x86/index.rst
> @@ -20,3 +20,4 @@ Linux x86 Support
> pat
> protection-keys
> intel_mpx
> + amd-memory-encryption
Thanks,
Mauro
