Idea is to bring all the functions that are different between the vendors into resource structure and initialize them dynamically. Add _intel suffix to Intel specific functions. Following function is implemented separately for each vendors. cbm_validate : Cache bitmask validate function. AMD allows non-contiguous masks. So, use separate functions for Intel and AMD. Signed-off-by: Babu Moger <babu.moger@xxxxxxx> --- arch/x86/kernel/cpu/resctrl.c | 9 ++++++++- arch/x86/kernel/cpu/resctrl.h | 11 +++++++---- arch/x86/kernel/cpu/resctrl_ctrlmondata.c | 4 ++-- 3 files changed, 17 insertions(+), 7 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl.c b/arch/x86/kernel/cpu/resctrl.c index eeb7e0e4883e..3f26c7c114e7 100644 --- a/arch/x86/kernel/cpu/resctrl.c +++ b/arch/x86/kernel/cpu/resctrl.c @@ -877,7 +877,14 @@ static __init void rdt_init_res_defs_intel(void) struct rdt_resource *r; for_each_rdt_resource(r) { - if (r->rid == RDT_RESOURCE_MBA) { + if (r->rid == RDT_RESOURCE_L3 || + r->rid == RDT_RESOURCE_L3DATA || + r->rid == RDT_RESOURCE_L3CODE || + r->rid == RDT_RESOURCE_L2 || + r->rid == RDT_RESOURCE_L2DATA || + r->rid == RDT_RESOURCE_L2CODE) + r->cbm_validate = cbm_validate_intel; + else if (r->rid == RDT_RESOURCE_MBA) { r->msr_base = IA32_MBA_THRTL_BASE; r->msr_update = mba_wrmsr_intel; r->parse_ctrlval = parse_bw_intel; diff --git a/arch/x86/kernel/cpu/resctrl.h b/arch/x86/kernel/cpu/resctrl.h index 8731b7c91c28..102bcffbefd7 100644 --- a/arch/x86/kernel/cpu/resctrl.h +++ b/arch/x86/kernel/cpu/resctrl.h @@ -410,10 +410,11 @@ struct rdt_parse_data { * @cache: Cache allocation related data * @format_str: Per resource format string to show domain value * @parse_ctrlval: Per resource function pointer to parse control values - * @evt_list: List of monitoring events - * @num_rmid: Number of RMIDs available - * @mon_scale: cqm counter * mon_scale = occupancy in bytes - * @fflags: flags to choose base and info files + * @cbm_validate Cache bitmask validate function + * @evt_list: List of monitoring events + * @num_rmid: Number of RMIDs available + * @mon_scale: cqm counter * mon_scale = occupancy in bytes + * @fflags: flags to choose base and info files */ struct rdt_resource { int rid; @@ -436,6 +437,7 @@ struct rdt_resource { int (*parse_ctrlval)(struct rdt_parse_data *data, struct rdt_resource *r, struct rdt_domain *d); + bool (*cbm_validate)(char *buf, u32 *data, struct rdt_resource *r); struct list_head evt_list; int num_rmid; unsigned int mon_scale; @@ -576,5 +578,6 @@ void cqm_setup_limbo_handler(struct rdt_domain *dom, unsigned long delay_ms); void cqm_handle_limbo(struct work_struct *work); bool has_busy_rmid(struct rdt_resource *r, struct rdt_domain *d); void __check_limbo(struct rdt_domain *d, bool force_free); +bool cbm_validate_intel(char *buf, u32 *data, struct rdt_resource *r); #endif /* _ASM_X86_RESCTRL_H */ diff --git a/arch/x86/kernel/cpu/resctrl_ctrlmondata.c b/arch/x86/kernel/cpu/resctrl_ctrlmondata.c index 78089ae8683c..71aa1d971430 100644 --- a/arch/x86/kernel/cpu/resctrl_ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl_ctrlmondata.c @@ -88,7 +88,7 @@ int parse_bw_intel(struct rdt_parse_data *data, struct rdt_resource *r, * are allowed (e.g. FFFFH, 0FF0H, 003CH, etc.). * Additionally Haswell requires at least two bits set. */ -static bool cbm_validate(char *buf, u32 *data, struct rdt_resource *r) +bool cbm_validate_intel(char *buf, u32 *data, struct rdt_resource *r) { unsigned long first_bit, zero_bit, val; unsigned int cbm_len = r->cache.cbm_len; @@ -148,7 +148,7 @@ int parse_cbm(struct rdt_parse_data *data, struct rdt_resource *r, return -EINVAL; } - if (!cbm_validate(data->buf, &cbm_val, r)) + if (r->cbm_validate && !r->cbm_validate(data->buf, &cbm_val, r)) return -EINVAL; if ((rdtgrp->mode == RDT_MODE_EXCLUSIVE || -- 2.17.1