This series adds support for AMD64 architectural extensions for Platform Quality of Service. These extensions are intended to provide for the monitoring of the usage of certain system resources by one or more processors and for the separate allocation and enforcement of limits on the use of certain system resources by one or more processors. The monitoring and enforcement are not necessarily applied across the entire system, but in general apply to a QOS domain which corresponds to some shared system resource. The set of resources which are monitored and the set for which the enforcement of limits is provided are implementation dependent. Platform QOS features are implemented on a logical processor basis. Therefore, multiple hardware threads of a single physical CPU core may have independent resource monitoring and enforcement configurations. AMD's next generation of processors support following QoS sub-features. - L3 Cache allocation enforcement - L3 Cache occupancy monitoring - L3 Code-Data Prioritization support - Memory Bandwidth Enforcement(Allocation) The public specification for this feature is available at https://developer.amd.com/wp-content/resources/56375.pdf Obviously, there are multiple ways we can go about these changes. We felt it is appropriate to rename and re-organize the code little bit before making the functional changes. The first few patches(1-10) renames and re-organizes the sources in preparation. Rest of the patches(7-11) adds support for AMD QoS features. Please review. Changes from v5 -> v6: a. Addressed comments from Fenghua Yu. Added vendor check while detecting MBA software controller support. a. Rebased again on top of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/cache Changes from v4 -> v5: https://lore.kernel.org/lkml/20181018225124.23043-1-babu.moger@xxxxxxx/ a. Addressed comments from Fenghua Yu. b. The functions update_mba_bw and set_mba_sc is not required for AMD. Removed all the changes related to these functions. Changes from v3 -> v4: https://lore.kernel.org/lkml/20181015205514.25387-1-babu.moger@xxxxxxx/ a. Addressed comments from Reinette Chatre and Borislav Petkov. b. Removed X86 dependancy for CONFIG_AMD_QOS. Implicitly is it already dependent on X86. c. Updated the MAINTAINER file for name changes. d. Addressed most of "checkpatch.pl --strict" issues. d. Updated Documentation/x86/resctrl_ui.txt(previously intel_rdt_ui.txt) file with AMD specific details. Changed few names to resctrl from intel_rdt. Changes from v2 -> v3: https://lore.kernel.org/lkml/20181011203223.18157-1-babu.moger@xxxxxxx/ a. Rebased the patches on top of below branch as suggested by Thomas Gleixner. git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/cache b. Addressed comments from Reinette Chatre, Fenghua Yu and Borislav Petkov. c. Main changes are related to renaming the files and functions. Renamed from intel_rdt to more generic resctrl(patches 1 to 3). d. Config parameter changed from PLATFORM_QOS to more generic RESCTRL. e. Fixed minor indentation issues. Changes from v1 -> v2: https://lore.kernel.org/lkml/20181005205512.29545-1-babu.moger@xxxxxxx/ a. Removed RFC from subject header. Based on the discussion so far, plan is to go ahead with these patches and eventually re-structure the code to make arch and non-arch separate. b. Addressed comments from Reinette Chatre and Fenghua Yu. c. Separated quirks and MBA from rdt init code. Kept the rest of the code as is. d. Added _intel suffixes all the Intel only code just like AMD code. e. Added one more patch to bring the macros into header file. f. Few minor text changes. v1: https://lore.kernel.org/lkml/20180924191841.29111-1-babu.moger@xxxxxxx/ Babu Moger (13): arch/x86: Start renaming the rdt files to more generic names arch/x86: Rename the RDT functions and definitions arch/x86: Re-arrange RDT init code arch/x86: Bring all the macros to resctrl.h arch/x86: Introduce a new config parameter RESCTRL arch/x86: Use new config parameter RESCTRL for compilation arch/x86: Initialize the resource functions that are different arch/x86: Bring cbm_validate function into the resource structure arch/x86: Add vendor check for MBA software controller arch/x86: Introduce new config parameter AMD_QOS arch/x86: Introduce QOS feature for AMD Documentation/x86: Rename and update intel_rdt_ui.txt MAINTAINERS: Update the file and documentation names in arch/x86 Sherry Hurwitz (1): arch/x86: Add AMD feature bit X86_FEATURE_MBA in cpuid bits array .../x86/{intel_rdt_ui.txt => resctrl_ui.txt} | 9 +- MAINTAINERS | 6 +- arch/x86/Kconfig | 19 ++ .../{intel_rdt_sched.h => resctrl_sched.h} | 28 +-- arch/x86/kernel/cpu/Makefile | 6 +- .../x86/kernel/cpu/{intel_rdt.c => resctrl.c} | 168 +++++++++++++++--- .../x86/kernel/cpu/{intel_rdt.h => resctrl.h} | 37 ++-- ...dt_ctrlmondata.c => resctrl_ctrlmondata.c} | 80 ++++++++- ...{intel_rdt_monitor.c => resctrl_monitor.c} | 20 +-- ...dt_pseudo_lock.c => resctrl_pseudo_lock.c} | 6 +- ...ck_event.h => resctrl_pseudo_lock_event.h} | 2 +- ...ntel_rdt_rdtgroup.c => resctrl_rdtgroup.c} | 19 +- arch/x86/kernel/cpu/scattered.c | 7 +- arch/x86/kernel/process_32.c | 4 +- arch/x86/kernel/process_64.c | 4 +- include/linux/sched.h | 2 +- 16 files changed, 321 insertions(+), 96 deletions(-) rename Documentation/x86/{intel_rdt_ui.txt => resctrl_ui.txt} (99%) rename arch/x86/include/asm/{intel_rdt_sched.h => resctrl_sched.h} (77%) rename arch/x86/kernel/cpu/{intel_rdt.c => resctrl.c} (85%) rename arch/x86/kernel/cpu/{intel_rdt.h => resctrl.h} (94%) rename arch/x86/kernel/cpu/{intel_rdt_ctrlmondata.c => resctrl_ctrlmondata.c} (86%) rename arch/x86/kernel/cpu/{intel_rdt_monitor.c => resctrl_monitor.c} (97%) rename arch/x86/kernel/cpu/{intel_rdt_pseudo_lock.c => resctrl_pseudo_lock.c} (99%) rename arch/x86/kernel/cpu/{intel_rdt_pseudo_lock_event.h => resctrl_pseudo_lock_event.h} (95%) rename arch/x86/kernel/cpu/{intel_rdt_rdtgroup.c => resctrl_rdtgroup.c} (99%) -- 2.17.1
