On 15/10/18 13:00, hannah@xxxxxxxxxxx wrote:
From: Hanna Hawa <hannah@xxxxxxxxxxx>
Add specific compatible string for Marvell usage due errata of
accessing 64bit registers of ARM SMMU, in AP806.
AP806 SOC use the generic ARM-MMU500, and there's no specific
implementation of Marvell, this compatible is used for errata only.
Given that, I think something more specific like:
"marvell,ap806-smmu", "arm,mmu-500";
would be most appropriate. Otherwise, if some future Marvell SoC were to
ever come out with a *different* MMU-500 integration problem, you'd
already have painted yourself into a corner.
Alternatively (or additionally), we could perhaps consider a separate
property like "marvell,32bit-config-access", to mirror the existing
handling of the secure integration bug.
Robin.
Signed-off-by: Hanna Hawa <hannah@xxxxxxxxxxx>
---
Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
index 8a6ffce..92d7263 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
@@ -16,6 +16,7 @@ conditions.
"arm,mmu-400"
"arm,mmu-401"
"arm,mmu-500"
+ "marvell,mmu-500"
"cavium,smmu-v2"
depending on the particular implementation and/or the
