> > I don't know if typical I3C transfers will be similar to I2C with > > usually small payloads where DMA usually makes not much sense. Yet, I > > think, that it might be a good idea to think about how this shall be > > handled with I3C right away. Maybe simply enforcing buffers to be > > DMA-safe. Or whatever. > > > > A clear rule on that might save you hazzle later. > > I completely agree. I'll clarify that and for people to pass DMA-able > buffers to this struct (just as the SPI framework does). Note that we Ok, cool! > don't really have a way to ensure that the buffer is actually > DMA-safe from the core, because this notion is architecture/SoC > dependent. True, we can't ensure it at the core. Still, a documented rule will make it clear that everything else is considered a bug. Much better than a gray area you have to deal with later. Kind regards, Wolfram
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