On Mon, Apr 25, 2016 at 08:34:07PM +0300, Jarkko Sakkinen wrote: > Intel(R) SGX is a set of CPU instructions that can be used by > applications to set aside private regions of code and data. The code > outside the enclave is disallowed to access the memory inside the > enclave by the CPU access control. > > The firmware uses PRMRR registers to reserve an area of physical memory > called Enclave Page Cache (EPC). There is a hardware unit in the > processor called Memory Encryption Engine. The MEE encrypts and decrypts > the EPC pages as they enter and leave the processor package. > > Jarkko Sakkinen (5): > x86, sgx: common macros and definitions > intel_sgx: driver for Intel Secure Guard eXtensions > intel_sgx: ptrace() support for the driver > intel_sgx: driver documentation > intel_sgx: TODO file for the staging area > > Kai Huang (1): > x86: add SGX definition to cpufeature > > Documentation/x86/intel_sgx.txt | 86 +++ > arch/x86/include/asm/cpufeature.h | 1 + > arch/x86/include/asm/sgx.h | 253 +++++++ Why are you asking for this to go into staging? What is keeping it out of the "real" part of the kernel tree? And staging code is self-contained, putting files in arch/* isn't ok for it, which kind of implies that you should get this merged correctly. I need a lot more information here before I can take this code... thanks, greg k-h -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
