On Friday 18 April 2014, Ley Foon Tan wrote:
> +static inline int dma_supported(struct device *dev, u64 mask)
> +{
> + /* we fall back to GFP_DMA when the mask isn't all 1s,
> + * so we can't guarantee allocations that must be
> + * within a tighter range than GFP_DMA.
> + */
> + if (mask < 0x00ffffff)
> + return 0;
> +
> + return 1;
> +}
> +void *dma_alloc_coherent(struct device *dev, size_t size,
> + dma_addr_t *dma_handle, gfp_t gfp)
> +{
> + void *ret;
> +
> + /* ignore region specifiers */
> + gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
> +
> + /* optimized page clearing */
> + gfp |= __GFP_ZERO;
> +
> + if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
> + gfp |= GFP_DMA;
What is the significance of ZONE_DMA on this architecture?
Do you actually have DMA masters with a 0x00ffffff mask?
Arnd
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