The Berlin BG2 has two supported PLLs: CPU PLL and System PLL, add those to the
SoC device tree.
This also moves the remaining clocks from the clocks container node to the root.
Signed-off-by: Alexandre Belloni <alexandre.belloni@xxxxxxxxxxxxxxxxxx>
---
arch/arm/boot/dts/berlin2.dtsi | 48 +++++++++++++++++++++++++++---------------
1 file changed, 31 insertions(+), 17 deletions(-)
diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
index 56a1af2f1052..6c080eb6242a 100644
--- a/arch/arm/boot/dts/berlin2.dtsi
+++ b/arch/arm/boot/dts/berlin2.dtsi
@@ -37,24 +37,24 @@
};
};
- clocks {
- smclk: sysmgr-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <25000000>;
- };
+ smclk: sysmgr-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
- cfgclk: cfg-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <100000000>;
- };
+ cfgclk: cfg-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ };
- sysclk: system-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <400000000>;
- };
+ twdclk: twdclk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&cpupll>;
+ clock-mult = <1>;
+ clock-div = <3>;
};
soc {
@@ -83,7 +83,21 @@
compatible = "arm,cortex-a9-twd-timer";
reg = <0xad0600 0x20>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&sysclk>;
+ clocks = <&twdclk>;
+ };
+
+ syspll: syspll@ea0014 {
+ compatible = "marvell,berlin2-pll";
+ clocks = <&smclk>;
+ #clock-cells = <0>;
+ reg = <0xea0014 8>;
+ };
+
+ cpupll: cpupll@ea003c {
+ compatible = "marvell,berlin2-pll";
+ clocks = <&smclk>;
+ #clock-cells = <0>;
+ reg = <0xea003c 8>;
};
apb@e80000 {
--
1.8.3.2
--
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