On Wednesday 05 February 2014, Michal Simek wrote: > I am not quite sure what you mean by reports to user space. > If you mean to get timeout through ioctl for example - then yes it is working > through standard watchdog ioctl interface and timeout is calculated > from hardware setup. Yes, that is what I meant. I believe most other watchdogs let you program the timeout, but I don't see anything wrong with having that fixed in the FPGA in your case. Still, the choice of putting the timeout into DT in terms of cycles rather than miliseconds wasn't ideal from an interface perspective and we should change that if/when we do a generic binding. I can definitely see where it's coming from for your case, as the cycle count totally makes sense from an FPGA tool perspective... Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
