Wed, Feb 19, 2025 at 03:21:30AM +0100, kuba@xxxxxxxxxx wrote: >On Fri, 14 Feb 2025 13:54:43 +0100 Jiri Pirko wrote: >> For the record, I'm still not convinced that introducing this kind of >> shared inter-devlink lock is good idea. We spent quite a bit of painful >> times getting rid of global devlink_mutex and making devlink locking >> scheme nice and simple as it currently is. >> >> But at the same time I admit I can't think of any other nicer solution >> to the problem this patchset is trying to solve. >> >> Jakub, any thoughts? > >The problem comes from having a devlink instance per function / >port rather than for the ASIC. Spawn a single instance and the >problem will go away 🤷️ Yeah, we currently have VF devlink ports created under PF devlink instance. That is aligned with PCI geometry. If we have a single per-ASIC parent devlink, this does not change and we still need to configure cross PF devlink instances. The only benefit I see is that we don't need rate domain, but we can use parent devlink instance lock instead. The locking ordering might be a bit tricky to fix though. > >I think we talked about this multiple times, I think at least >once with Jake, too. Not that I remember all the details now.. >-- >pw-bot: cr
