On Fri, Feb 07, 2025 at 06:37:27PM +0000, Mark Rutland wrote: > On Tue, Jan 07, 2025 at 10:59:43PM +0000, Mark Brown wrote: > > The 2024 dpISA introduces a number of architecture features all of which > > only add new instructions so only require the addition of hwcaps and ID > > register visibility. > While working on SME fixes atop v6.14-rc1, I found this patch breaks the > build spectacularly with CONFIG_ARM64_SME is enabled (splat at the end > of this mail), due to some missing definitions. Yes, I already sent a fix for that which Will has merged: https://lore.kernel.org/r/20250203-arm64-remove-sf8mmx-v1-1-6f1da3dbff82@xxxxxxxxxx > From a quick scan, there are some other missing bits too. For example > these two caps are defined in terms of ID_AA64FPFR0_EL1 fields: > > +HWCAP_F8MM8 > > + Functionality implied by ID_AA64FPFR0_EL1.F8MM8 == 0b0001. > > + > > +HWCAP_F8MM4 > > + Functionality implied by ID_AA64FPFR0_EL1.F8MM4 == 0b0001. > > +#define KERNEL_HWCAP_F8MM8 __khwcap_feature(F8MM8) > > +#define KERNEL_HWCAP_F8MM4 __khwcap_feature(F8MM4) > > +#define HWCAP_F8MM8 (1UL << 35) > > +#define HWCAP_F8MM4 (1UL << 36) > ... and we expose the ID register bits to userspace: > ... but there's no corresponding arm64_elf_hwcaps additions to actually > expose the hwcaps. Right, indeed. I'll send a fix for that. > There are *SME* variants in arm64_elf_hwcaps: ... > ... but those KERNEL_HWCAP_SME_* values are never defined, and neither > are the UAPI equivalents. > We need to fix that quick, in case we need to shuffle values. These were removed in the patch above, the relevant features were removed from the architecture between the 2024-09 and 2024-12 XML releases so were removed from the patch series by the time it got applied but with CONFIG_SME being disabled the stray reference wasn't caught by testing.
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