On Tue, Jan 28, 2025 at 02:41:17PM +0530, Anshuman Khandual wrote: > On 1/18/25 03:37, Rob Herring wrote: > > On Thu, Jan 16, 2025 at 9:32 AM Catalin Marinas <catalin.marinas@xxxxxxx> wrote: > >> > >> On Wed, Jan 08, 2025 at 07:47:16AM -0600, Rob Herring wrote: > >>> On Wed, Jan 8, 2025 at 5:15 AM Marc Zyngier <maz@xxxxxxxxxx> wrote: > >>>> On Tue, 07 Jan 2025 22:13:47 +0000, > >>>> Rob Herring <robh@xxxxxxxxxx> wrote: > >>>>> On Tue, Jan 7, 2025 at 6:13 AM Catalin Marinas <catalin.marinas@xxxxxxx> wrote: > >>>>>> But does KVM actually expose the feature to EL1 in ID_AA64DFR1_EL1 and > >>>>>> than traps it at EL2? > >>>>> > >>>>> As Marc pointed out KVM only advertises PMUv3.8. Regardless, guest > >>>>> accesses to these registers are trapped with or without this series. > >>>> > >>>> And most probably generates a nice splat in the kernel log, as nobody > >>>> updated KVM to handle *correctly* PMICNTR_EL0 traps, let alone deal > >>>> with the FGT2 registers. > >>> > >>> Isn't that this series[1]? Should that have come first, I guess I know > >>> that *now*. > >> [...] > >>> [1] https://lore.kernel.org/all/20241210055311.780688-1-anshuman.khandual@xxxxxxx/ > >> > >> It's not any clearer to me. Does this series depend on the 46-patch one? > >> Or, if we had the other, is this no longer needed? Or none of these, > >> they are independent. > > > > They are independent. I think ideally we'd want everything landing at > > the same time, but we're past ideal at this point. Without this > > series, if someone uses PMU on v8.9 and firmware enabled FGT2, then > > the kernel will crash. Without the above series, KVM will have > > warnings in the kernel log, but otherwise function. > > Right, they are independent. Just that Rob had observed this PMU v3.8 boot > requirement while reviewing the HW breakpoint series earlier. I should just > respin this series after the upcoming v6.14-rc1 release is out ? They may apply cleanly but please do rebase and repost at -rc1. Thanks. -- Catalin
