On Wed, Jan 15, 2025 at 07:26:28AM +0100, Christoph Hellwig wrote: > On Tue, Jan 14, 2025 at 08:50:35PM +0000, Robin Murphy wrote: <...> > >> + if (dev_use_swiotlb(dev, size, dir) && iova_offset(iovad, phys | size)) > > > > Again, why are we supporting non-granule-aligned mappings in the middle of > > a range when the documentation explicitly says not to? > > It's not trying to support that, but checking that this is guaranteed > to be the last one is harder than handling it like this. If you have > a suggestion for better checks that would be very welcome. > > >> + if (!dev_is_dma_coherent(dev) && > >> + !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) > >> + arch_sync_dma_for_cpu(phys, len, dir); > > > > Hmm, how do attrs even work for a bulk unlink/destroy when the individual > > mappings could have been linked with different values? > > They shouldn't. Just like randomly mixing flags doesn't work for the > existing APIs. > > > (So no, irrespective of how conceptually horrid it is, clearly it's not > > even functionally viable to open-code abuse of DMA_ATTR_SKIP_CPU_SYNC in > > callers to attempt to work around P2P mappings...) > > What do you mean with "work around"? I guess Leon added it to the hmm > code based on previous feedback, but I still don't think any of our P2P > infrastructure works reliably with non-coherent devices as > iommu_dma_map_sg gets this wrong. So despite the earlier comments I > suspect this should stick to the state of the art even if that is broken. Right, I was asked to set DMA_ATTR_SKIP_CPU_SYNC for PCI_P2PDMA_MAP_THRU_HOST_BRIDGE case. ... 752 case PCI_P2PDMA_MAP_THRU_HOST_BRIDGE: 753 attrs |= DMA_ATTR_SKIP_CPU_SYNC; 754 pfns[idx] |= HMM_PFN_P2PDMA; 755 break; At this stage, we didn't change DMA/IOMMU previous behaviour and if it was broken for certain flows, it stays to be broken after this series too. Thanks
