On Tue, 07 Jan 2025 12:13:40 +0000, Catalin Marinas <catalin.marinas@xxxxxxx> wrote: > > On Thu, Jan 02, 2025 at 10:04:02AM -0600, Rob Herring wrote: > > On Fri, Dec 20, 2024 at 12:52:33PM +0530, Anshuman Khandual wrote: > > > This series adds fine grained trap control in EL2 required for FEAT_PMUv3p9 > > > registers like PMICNTR_EL0, PMICFILTR_EL0, and PMUACR_EL1 which are already > > > being used in the kernel. This is required to prevent their EL1 access trap > > > into EL2. > > > > > > PMZR_EL0 register trap control i.e HDFGWTR2_EL2.nPMZR_EL0 remains unchanged > > > for now as it does not get accessed in the kernel, and there is no plan for > > > its access from user space. > > > > > > I have taken the liberty to pick up all the review tags for patches related > > > to tools sysreg update from the KVM FGT2 V2 patch series posted earlier. > > > > > > https://lore.kernel.org/all/20241210055311.780688-1-anshuman.khandual@xxxxxxx/ > > > > > > Rob had earler mentioned about FEAT_FGT2 based trap control requirement for > > > FEAT_PMUv3p9 registers that are currently being used in kernel. The context > > > can be found here. > > > > > > https://lore.kernel.org/all/20241216234251.GA629562-robh@xxxxxxxxxx/ > > > > > > This series is based on v6.13-rc3 > > > > > > Cc: Catalin Marinas <catalin.marinas@xxxxxxx> > > > Cc: Will Deacon <will@xxxxxxxxxx> > > > Cc: Marc Zyngier <maz@xxxxxxxxxx> > > > Cc: Ryan Roberts <ryan.roberts@xxxxxxx> > > > Cc: Mark Rutland <mark.rutland@xxxxxxx> > > > Cc: Mark Brown <robh@xxxxxxxxxx> > > > Cc: Rob Herring <robh@xxxxxxxxxx> > > > Cc: Oliver Upton <oliver.upton@xxxxxxxxx> > > > Cc: Jonathan Corbet <corbet@xxxxxxx> > > > Cc: Eric Auger <eric.auger@xxxxxxxxxx> > > > Cc: kvmarm@xxxxxxxxxxxxxxx > > > Cc: linux-doc@xxxxxxxxxxxxxxx > > > Cc: linux-kernel@xxxxxxxxxxxxxxx > > > Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > > > > > > Anshuman Khandual (7): > > > arm64/sysreg: Update register fields for ID_AA64MMFR0_EL1 > > > arm64/sysreg: Add register fields for HDFGRTR2_EL2 > > > arm64/sysreg: Add register fields for HDFGWTR2_EL2 > > > arm64/sysreg: Add register fields for HFGITR2_EL2 > > > arm64/sysreg: Add register fields for HFGRTR2_EL2 > > > arm64/sysreg: Add register fields for HFGWTR2_EL2 > > > arm64/boot: Enable EL2 requirements for FEAT_PMUv3p9 > > > > In case it is not clear, this series should be applied to 6.13 as the 2 > > PMUv3p9 features already landed in 6.13 (per counter EL0 control) and > > 6.12 (ICNTR). > > So is this a fix that needs backporting to 6.12 or 6.13, e.g. fix for > d8226d8cfbaf ("perf: arm_pmuv3: Add support for Armv9.4 PMU instruction > counter")? It's pretty late in the cycle to take the series for 6.13. > > But does KVM actually expose the feature to EL1 in ID_AA64DFR1_EL1 and > than traps it at EL2? We limit the PMU emulation to v3p8, so *hopefully* this doesn't trip anything in KVM, even if we don't advertise support for these features. This has been tested, right? Thanks, M. -- Without deviation from the norm, progress is not possible.
