On Fri, Dec 13, 2013 at 09:23:33AM +0800, Peter Chen wrote: > With the auto setting, the PHY's clock and power can be > recovered correctly from low power mode, it is ganranteed by IC logic. s/ganranteed/guaranteed Also, I think you need to be slightly more verbose here. Maybe explain a bit what is the "auto setting". From what I can see from the code, it's a way to let HW manage clock gating. Another question, does this feature work in all SoCs where this IP is available ? cheers -- balbi
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