> Alexandre Ghiti (11): > riscv: Move cpufeature.h macros into their own header > riscv: Do not fail to build on byte/halfword operations with Zawrs > riscv: Implement cmpxchg32/64() using Zacas > dt-bindings: riscv: Add Zabha ISA extension description > riscv: Implement cmpxchg8/16() using Zabha > riscv: Improve zacas fully-ordered cmpxchg() > riscv: Implement arch_cmpxchg128() using Zacas > riscv: Implement xchg8/16() using Zabha > riscv: Add ISA extension parsing for Ziccrse > dt-bindings: riscv: Add Ziccrse ISA extension description > riscv: Add qspinlock support > > Guo Ren (2): > asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock > asm-generic: ticket-lock: Add separate ticket-lock.h For the series, Reviewed-by: Andrea Parri <parri.andrea@xxxxxxxxx> Andrea
