Hi Babu, On 10/9/24 10:39 AM, Babu Moger wrote: > The ABMC feature provides an option to the user to assign a hardware > counter to an RMID, event pair and monitor the bandwidth as long as it is > assigned. The assigned RMID will be tracked by the hardware until the user > unassigns it manually. > > Counters are configured by writing to L3_QOS_ABMC_CFG MSR and > specifying the counter id, bandwidth source, and bandwidth types. > > Provide the interface to assign the counter ids to RMID. > > The feature details are documented in the APM listed below [1]. > [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming > Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth > Monitoring (ABMC). > > Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 > Signed-off-by: Babu Moger <babu.moger@xxxxxxx> > --- ... > --- > arch/x86/kernel/cpu/resctrl/internal.h | 3 ++ > arch/x86/kernel/cpu/resctrl/rdtgroup.c | 45 ++++++++++++++++++++++++++ > 2 files changed, 48 insertions(+) > > diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h > index 58298db9034f..6d4df0490186 100644 > --- a/arch/x86/kernel/cpu/resctrl/internal.h > +++ b/arch/x86/kernel/cpu/resctrl/internal.h > @@ -705,6 +705,9 @@ int mbm_cntr_alloc(struct rdt_resource *r); > void mbm_cntr_free(struct rdt_resource *r, u32 cntr_id); > void arch_mbm_evt_config_init(struct rdt_hw_mon_domain *hw_dom); > unsigned int mon_event_config_index_get(u32 evtid); > +int resctrl_arch_config_cntr(struct rdt_resource *r, struct rdt_mon_domain *d, > + enum resctrl_event_id evtid, u32 rmid, u32 closid, > + u32 cntr_id, bool assign); > void rdt_staged_configs_clear(void); > bool closid_allocated(unsigned int closid); > int resctrl_find_cleanest_closid(void); > diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c > index 03b670b95c49..4ab1a18010c9 100644 > --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c > +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c > @@ -1853,6 +1853,51 @@ static ssize_t mbm_local_bytes_config_write(struct kernfs_open_file *of, > return ret ?: nbytes; > } > > +static void resctrl_abmc_config_one_amd(void *info) > +{ > + u64 *msrval = info; > + > + wrmsrl(MSR_IA32_L3_QOS_ABMC_CFG, *msrval); > +} > + > +/* > + * Send an IPI to the domain to assign the counter to RMID, event pair. > + */ > +int resctrl_arch_config_cntr(struct rdt_resource *r, struct rdt_mon_domain *d, > + enum resctrl_event_id evtid, u32 rmid, u32 closid, > + u32 cntr_id, bool assign) > +{ > + struct rdt_hw_mon_domain *hw_dom = resctrl_to_arch_mon_dom(d); > + union l3_qos_abmc_cfg abmc_cfg = { 0 }; > + struct arch_mbm_state *arch_mbm; > + > + abmc_cfg.split.cfg_en = 1; > + abmc_cfg.split.cntr_en = assign ? 1 : 0; > + abmc_cfg.split.cntr_id = cntr_id; > + abmc_cfg.split.bw_src = rmid; > + > + /* Update the event configuration from the domain */ > + if (evtid == QOS_L3_MBM_TOTAL_EVENT_ID) { > + abmc_cfg.split.bw_type = hw_dom->mbm_total_cfg; > + arch_mbm = &hw_dom->arch_mbm_total[rmid]; > + } else { > + abmc_cfg.split.bw_type = hw_dom->mbm_local_cfg; > + arch_mbm = &hw_dom->arch_mbm_local[rmid]; > + } > + > + smp_call_function_any(&d->hdr.cpu_mask, resctrl_abmc_config_one_amd, > + &abmc_cfg, 1); > + > + /* > + * Reset the architectural state so that reading of hardware > + * counter is not considered as an overflow in next update. > + */ > + if (arch_mbm) > + memset(arch_mbm, 0, sizeof(struct arch_mbm_state)); > + More on this later, but I do believe later code can be simplified if reset of architectural state is done by caller. This function should focus on just configuring the counter. > + return 0; > +} > + > /* rdtgroup information files for one cache resource. */ > static struct rftype res_common_files[] = { > { Reinette
