Hi Babu, On 9/4/24 3:21 PM, Babu Moger wrote: > +/* > + * ABMC counters can be configured by writing to L3_QOS_ABMC_CFG. > + * @bw_type : Bandwidth configuration(supported by BMEC) > + * tracked by the @cntr_id. > + * @bw_src : Bandwidth source (RMID or CLOSID). > + * @reserved1 : Reserved. > + * @is_clos : @bw_src field is a CLOSID (not an RMID). > + * @cntr_id : Counter identifier. > + * @reserved : Reserved. > + * @cntr_en : Tracking enable bit. > + * @cfg_en : Configuration enable bit. > + * > + * Configuration and tracking: > + * CfgEn=1,CtrEn=0 : Configure CtrID and but no tracking the events yet. > + * CfgEn=1,CtrEn=1 : Configure CtrID and start tracking events. Thanks for moving the text ... could it now be made to match the new (outside AMD arch document) destination? For example, "CfgEn" becomes "@cfg_en", "CtrID" becomes "@cntr_id" etc. Also please fix language, for example what does "and but no tracking the events yet" mean? So far this work has focused on "counting" vs "not counting" events and it is not clear how this "tracking" fits it ... this seems to be the hardware view that means "tracking the RMID to which @cntr_id is assigned"? Please help readers to understand how the implementation is supported by the hardware. Reinette
