On Wed, Aug 7, 2024 at 10:56 AM Charlie Jenkins <charlie@xxxxxxxxxxxx> wrote: > > On Thu, Jun 27, 2024 at 10:22:38AM -0700, Evan Green wrote: > > In preparation for misaligned vector performance hwprobe keys, rename > > the hwprobe key values associated with misaligned scalar accesses to > > include the term SCALAR. Leave the old defines in place to maintain > > source compatibility. > > > > This change is intended to be a functional no-op. > > > > Signed-off-by: Evan Green <evan@xxxxxxxxxxxx> > > Reviewed-by: Charlie Jenkins <charlie@xxxxxxxxxxxx> > > > > --- > > > > Changes in v3: > > - Leave the old defines in place (Conor, Palmer) > > > > Changes in v2: > > - Added patch to rename misaligned perf key values (Palmer) > > > > Documentation/arch/riscv/hwprobe.rst | 14 +++++++------- > > arch/riscv/include/uapi/asm/hwprobe.h | 5 +++++ > > arch/riscv/kernel/sys_hwprobe.c | 10 +++++----- > > arch/riscv/kernel/traps_misaligned.c | 6 +++--- > > arch/riscv/kernel/unaligned_access_speed.c | 12 ++++++------ > > 5 files changed, 26 insertions(+), 21 deletions(-) > > > > diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst > > index 7121a00a8464..0d14e9d83a78 100644 > > --- a/Documentation/arch/riscv/hwprobe.rst > > +++ b/Documentation/arch/riscv/hwprobe.rst > > @@ -243,23 +243,23 @@ The following keys are defined: > > the performance of misaligned scalar native word accesses on the selected set > > of processors. > > > > - * :c:macro:`RISCV_HWPROBE_MISALIGNED_UNKNOWN`: The performance of misaligned > > - accesses is unknown. > > + * :c:macro:`RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN`: The performance of > > + misaligned accesses is unknown. > > Hey Evan, > > This series hasn't landed yet, can you rebase and resend? There is a > patch [1] that changes the wording of this description to "misaligned > scalar" instead of "misaligned". Can you apply that wording change to > these new keys? Done.
