Add punit and sunil in the loop. On Sat, Jun 22, 2024 at 10:55 AM Yunhui Cui <cuiyunhui@xxxxxxxxxxxxx> wrote: > > From: Palmer Dabbelt <palmer@xxxxxxxxxxxx> > > A handful of user-visible behavior is based on the frequency of the > time CSR. > > Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx> > Signed-off-by: Yunhui Cui <cuiyunhui@xxxxxxxxxxxxx> > Reviewed-by: Evan Green <evan@xxxxxxxxxxxx> > Reviewed-by: Anup Patel <anup@xxxxxxxxxxxxxx> > --- > Documentation/arch/riscv/hwprobe.rst | 2 ++ > arch/riscv/include/asm/hwprobe.h | 2 +- > arch/riscv/include/uapi/asm/hwprobe.h | 1 + > arch/riscv/kernel/sys_hwprobe.c | 5 +++++ > 4 files changed, 9 insertions(+), 1 deletion(-) > > diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst > index df5045103e73..ec3c99474ed7 100644 > --- a/Documentation/arch/riscv/hwprobe.rst > +++ b/Documentation/arch/riscv/hwprobe.rst > @@ -233,3 +233,5 @@ The following keys are defined: > > * :c:macro:`RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE`: An unsigned int which > represents the size of the Zicboz block in bytes. > + > +* :c:macro:`RISCV_HWPROBE_KEY_TIME_CSR_FREQ`: Frequency (in Hz) of `time CSR`. > diff --git a/arch/riscv/include/asm/hwprobe.h b/arch/riscv/include/asm/hwprobe.h > index 150a9877b0af..ef01c182af2b 100644 > --- a/arch/riscv/include/asm/hwprobe.h > +++ b/arch/riscv/include/asm/hwprobe.h > @@ -8,7 +8,7 @@ > > #include <uapi/asm/hwprobe.h> > > -#define RISCV_HWPROBE_MAX_KEY 7 > +#define RISCV_HWPROBE_MAX_KEY 8 > > static inline bool riscv_hwprobe_key_is_valid(__s64 key) > { > diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h > index 2fb8a8185e7a..5053a9b18710 100644 > --- a/arch/riscv/include/uapi/asm/hwprobe.h > +++ b/arch/riscv/include/uapi/asm/hwprobe.h > @@ -74,6 +74,7 @@ struct riscv_hwprobe { > #define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0) > #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6 > #define RISCV_HWPROBE_KEY_MISALIGNED_PERF 7 > +#define RISCV_HWPROBE_KEY_TIME_CSR_FREQ 8 > /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */ > > /* Flags */ > diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c > index e4ec9166339f..3d47edc04a3f 100644 > --- a/arch/riscv/kernel/sys_hwprobe.c > +++ b/arch/riscv/kernel/sys_hwprobe.c > @@ -8,6 +8,7 @@ > #include <asm/cacheflush.h> > #include <asm/cpufeature.h> > #include <asm/hwprobe.h> > +#include <asm/delay.h> > #include <asm/sbi.h> > #include <asm/switch_to.h> > #include <asm/uaccess.h> > @@ -227,6 +228,10 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair, > pair->value = riscv_cboz_block_size; > break; > > + case RISCV_HWPROBE_KEY_TIME_CSR_FREQ: > + pair->value = riscv_timebase; > + break; > + > /* > * For forward compatibility, unknown keys don't fail the whole > * call, but get their element key set to -1 and value set to 0 > -- > 2.20.1 >