On 6/13/2024 3:54 PM, Russell King (Oracle) wrote:
On Wed, Jun 12, 2024 at 05:53:16PM +0800, Luo Jie wrote:
@@ -1865,7 +1872,8 @@ static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
state->interface != PHY_INTERFACE_MODE_RXAUI &&
state->interface != PHY_INTERFACE_MODE_XAUI &&
- state->interface != PHY_INTERFACE_MODE_USXGMII)
+ state->interface != PHY_INTERFACE_MODE_USXGMII &&
+ state->interface != PHY_INTERFACE_MODE_10G_QXGMII)
state->interface = PHY_INTERFACE_MODE_NA;
It would be better, rather than extending this workaround, instead to
have the PHY driver set phy->possible_interfaces in its .config_init
method. phy->possible_interfaces should be the set of interfaces that
the PHY _will_ use given its configuration for the different media
speeds. I think that means just PHY_INTERFACE_MODE_10G_QXGMII for
your configuration.
Thanks.
Hi Russell,
Yes, for QCA8084(pure PHY chip), only PHY_INTERFACE_MODE_10G_QXGMII will
be set to the phy->possible_interfaces when it works on the interface
mode PHY_INTERFACE_MODE_10G_QXGMII.
I will push a new patch series to remove PHY_INTERFACE_MODE_10G_QXGMII
from this work-around validation here.
Thanks,
Jie
