The Analog Devices Inc. AD4695 (and similar chips) are complex ADCs that will benefit from a detailed driver documentation. This documents the current features supported by the driver. Signed-off-by: David Lechner <dlechner@xxxxxxxxxxxx> --- Documentation/iio/ad4695.rst | 145 +++++++++++++++++++++++++++++++++++++++++++ Documentation/iio/index.rst | 1 + MAINTAINERS | 1 + 3 files changed, 147 insertions(+) diff --git a/Documentation/iio/ad4695.rst b/Documentation/iio/ad4695.rst new file mode 100644 index 000000000000..6e142561524e --- /dev/null +++ b/Documentation/iio/ad4695.rst @@ -0,0 +1,145 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +============= +AD4695 driver +============= + +ADC driver for Analog Devices Inc. AD4695 and similar devices. The module name +is ``ad4695``. + + +Supported devices +================= + +The following chips are supported by this driver: + +* `AD4695 <https://www.analog.com/AD4695>`_ +* `AD4696 <https://www.analog.com/AD4696>`_ +* `AD4697 <https://www.analog.com/AD4697>`_ +* `AD4698 <https://www.analog.com/AD4698>`_ + + +Supported features +================== + +SPI wiring modes +---------------- + +The driver currently supports the following SPI wiring configuration: + +4-wire mode +^^^^^^^^^^^ + +In this mode, CNV and CS are tied together and there is a single SDO line. + +.. code-block:: + + +-------------+ +-------------+ + | CS |<-+------| CS | + | CNV |<-+ | | + | ADC | | HOST | + | | | | + | SDI |<--------| SDO | + | SDO |-------->| SDI | + | SCLK |<--------| SCLK | + +-------------+ +-------------+ + +To use this mode, in the device tree, omit the ``cnv-gpios`` and +``spi-rx-bus-width`` properties. + +Channel configuration +--------------------- + +Since the chip supports multiple ways to configure each channel, this must be +described in the device tree based on what is actually wired up to the inputs. + +There are three typical configurations: + +Single-ended where a pin is used with the ``REFGND`` pin, pseudo-differential +where a pin is used with the ``COM`` pin and differential where two ``INx`` +pins are used as a pair + +Single-ended input +^^^^^^^^^^^^^^^^^^ + +Each ``INx`` pin can be used as a single-ended input in conjunction with the +``REFGND`` pin. The device tree will look like this: + +.. code-block:: + + channel@2 { + reg = <2>; + }; + +This will appear on the IIO bus as the ``voltage2`` channel. The processed value +(*raw × scale*) will be the voltage between the ``INx`` relative to ``REFGND``. +(Offset is always 0 when pairing with ``REFGND``.) + +Pseudo-differential input +^^^^^^^^^^^^^^^^^^^^^^^^^ + +Each ``INx`` pin can be used as a pseudo-differential input in conjunction with +the ``COM`` pin. The device tree will look like this: + +.. code-block:: + + com-supply = <&vref_div_2>; + + channel@3 { + reg = <3>; + adi,pin-pairing = "com"; + bipolar; + }; + +This will appear on the IIO bus as the ``voltage3`` channel. The processed value +(*(raw + offset) × scale*) will be the voltage measured on ``INx`` relative to +``REFGND``. (The offset is determined by the ``com-supply`` voltage.) + +Differential input +^^^^^^^^^^^^^^^^^^ + +An even-numbered ``INx`` pin and the following odd-numbered ``INx`` pin can be +used as a differential pair. The device tree for using ``IN0`` as the positive +input and ``IN1`` as the negative input will look like this: + +.. code-block:: + + channel@0 { + reg = <0>; + adi,pin-pairing = "next"; + bipolar; + }; + +This will appear on the IIO bus as the ``voltage0-voltage1`` channel. The +processed value (*raw × scale*) will be the voltage difference between the two +pins. (Offset is always 0 for differential channels.) + +VCC supply +---------- + +The chip supports being powered by an external LDO via the ``VCC`` input or an +internal LDO via the ``LDO_IN`` input. The driver looks at the device tree to +determine which is being used. If ``ldo-supply`` is present, then the internal +LDO is used. If ``vcc-supply`` is present, then the external LDO is used and +the internal LDO is disabled. + +Reference voltage +----------------- + +The chip supports an external reference voltage via the ``REF`` input or an +internal buffered reference voltage via the ``REFIN`` input. The driver looks +at the device tree to determine which is being used. If ``ref-supply`` is +present, then the external reference voltage is used and the internal buffer is +disabled. If ``refin-supply`` is present, then the internal buffered reference +voltage is used. + +Unimplemented features +---------------------- + +- Additional wiring modes +- Buffered reads +- Threshold events +- Oversampling +- Gain/offset calibration +- GPIO support +- CRC support diff --git a/Documentation/iio/index.rst b/Documentation/iio/index.rst index 4c13bfa2865c..df69a76bf583 100644 --- a/Documentation/iio/index.rst +++ b/Documentation/iio/index.rst @@ -17,6 +17,7 @@ Industrial I/O Kernel Drivers .. toctree:: :maxdepth: 1 + ad4695 ad7944 adis16475 adis16480 diff --git a/MAINTAINERS b/MAINTAINERS index 611b7929e650..edd1a4e8f538 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1198,6 +1198,7 @@ L: linux-iio@xxxxxxxxxxxxxxx S: Supported W: https://ez.analog.com/linux-software-drivers F: Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml +F: Documentation/iio/index.rst F: drivers/iio/dac/ad3552r.c ANALOG DEVICES INC AD4130 DRIVER -- 2.45.2
