On Fri, Mar 01, 2024 at 05:44:06PM +0100, Clément Léger wrote: > Some userspace applications (OpenJDK for instance) uses the free MSBs > in pointers to insert additional information for their own logic and > need to get this information from somewhere. Currently they rely on > parsing /proc/cpuinfo "mmu=svxx" string to obtain the current value of > virtual address usable bits [1]. Since this reflect the raw supported > MMU mode, it might differ from the logical one used internally which is > why arch_get_mmap_end() is used. Exporting the highest mmapable address > through hwprobe will allow a more stable interface to be used. For that > purpose, add a new hwprobe key named > RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS which will export the highest > userspace virtual address. > > Link: https://github.com/openjdk/jdk/blob/master/src/hotspot/os_cpu/linux_riscv/vm_version_linux_riscv.cpp#L171 [1] > Signed-off-by: Clément Léger <cleger@xxxxxxxxxxxx> > > --- > > v3: > - Note: I did not added Stefan Reviewed-by since I did more > modifications than just a simple respin. > - Handle CONFIG_MMU=n as well and rename the key to > RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS > - Add a user_max_virt_addr() macro to handle !MMU config > - Link to v2: https://lore.kernel.org/lkml/20240220110950.871307-1-cleger@xxxxxxxxxxxx/ > > v2: > - Note: tried sysconf to export it but this is not backed by syscall > and thus does not allow exporting such information easily. > - Use arch_get_mmap_end() instead of VA_BITS since it reflects the > maximum logical address used by the riscv port > - Change hwprobe key name from RISCV_HWPROBE_KEY_VA_BITS to > RISCV_HWPROBE_KEY_MAX_ADDRESS > - Link to v1: https://lore.kernel.org/lkml/20240201140319.360088-1-cleger@xxxxxxxxxxxx/ > --- > Documentation/arch/riscv/hwprobe.rst | 3 +++ > arch/riscv/include/asm/hwprobe.h | 2 +- > arch/riscv/include/asm/processor.h | 8 +++++++- > arch/riscv/include/uapi/asm/hwprobe.h | 1 + > arch/riscv/kernel/sys_hwprobe.c | 4 ++++ > 5 files changed, 16 insertions(+), 2 deletions(-) > > diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst > index b2bcc9eed9aa..875d3122bd66 100644 > --- a/Documentation/arch/riscv/hwprobe.rst > +++ b/Documentation/arch/riscv/hwprobe.rst > @@ -210,3 +210,6 @@ The following keys are defined: > > * :c:macro:`RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE`: An unsigned int which > represents the size of the Zicboz block in bytes. > + > +* :c:macro:`RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS`: An unsigned long which > + represent the highest userspace virtual address usable. > diff --git a/arch/riscv/include/asm/hwprobe.h b/arch/riscv/include/asm/hwprobe.h > index 630507dff5ea..150a9877b0af 100644 > --- a/arch/riscv/include/asm/hwprobe.h > +++ b/arch/riscv/include/asm/hwprobe.h > @@ -8,7 +8,7 @@ > > #include <uapi/asm/hwprobe.h> > > -#define RISCV_HWPROBE_MAX_KEY 6 > +#define RISCV_HWPROBE_MAX_KEY 7 > > static inline bool riscv_hwprobe_key_is_valid(__s64 key) > { > diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h > index a8509cc31ab2..341863d4d989 100644 > --- a/arch/riscv/include/asm/processor.h > +++ b/arch/riscv/include/asm/processor.h > @@ -14,7 +14,7 @@ > > #include <asm/ptrace.h> > > -#ifdef CONFIG_64BIT > +#if defined(CONFIG_64BIT) && defined(CONFIG_MMU) > #define DEFAULT_MAP_WINDOW (UL(1) << (MMAP_VA_BITS - 1)) > #define STACK_TOP_MAX TASK_SIZE > > @@ -58,6 +58,12 @@ > > #define STACK_TOP DEFAULT_MAP_WINDOW > > +#ifdef CONFIG_MMU > +#define user_max_virt_addr() arch_get_mmap_end(ULONG_MAX, 0, 0) > +#else > +#define user_max_virt_addr() 0 > +#endif /* CONFIG_MMU */ > + > /* > * This decides where the kernel will search for a free chunk of vm > * space during mmap's. > diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h > index 9f2a8e3ff204..3630e3f30354 100644 > --- a/arch/riscv/include/uapi/asm/hwprobe.h > +++ b/arch/riscv/include/uapi/asm/hwprobe.h > @@ -67,6 +67,7 @@ struct riscv_hwprobe { > #define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0) > #define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0) > #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6 > +#define RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS 7 > /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */ > > /* Flags */ > diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c > index a7c56b41efd2..560ea41a716d 100644 > --- a/arch/riscv/kernel/sys_hwprobe.c > +++ b/arch/riscv/kernel/sys_hwprobe.c > @@ -8,6 +8,7 @@ > #include <asm/cacheflush.h> > #include <asm/cpufeature.h> > #include <asm/hwprobe.h> > +#include <asm/processor.h> > #include <asm/sbi.h> > #include <asm/switch_to.h> > #include <asm/uaccess.h> > @@ -202,6 +203,9 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair, > if (hwprobe_ext0_has(cpus, RISCV_HWPROBE_EXT_ZICBOZ)) > pair->value = riscv_cboz_block_size; > break; > + case RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS: > + pair->value = user_max_virt_addr(); > + break; > > /* > * For forward compatibility, unknown keys don't fail the whole > -- > 2.43.0 > Looks like a great solution. Reviewed-by: Charlie Jenkins <charlie@xxxxxxxxxxxx>
