Every FPGA toolchain I know of has a way to emit JAM/STAPL bytecode files... and a fair number of programming scenarios need them. Jason Gunthorpe <jgunthorpe@xxxxxxxxxxxxxxxxxxxx> wrote: >On Fri, Oct 04, 2013 at 04:33:41PM -0700, Greg Kroah-Hartman wrote: > >> > I agree that the firmware interface makes sense when the use of the >> > FPGA is an implementation detail in a fixed hardware configuration, >> > but that is a fairly restricted use case all things considered. >> >> Ideally I thought this would be just like "firmware", you dump the >file >> to the FPGA, it validates it and away you go with a new image running >in >> the chip. > >That is 99% of the use cases. The other stuff people are talking about >is fringe. > >I've been doing FPGAs for > 10 years and I've never once used read back >via the config bus. In fact all my FPGAs turn that feature off once >they are loaded. > >Partial reconfiguration is very specialized, and hard to use from a >FPGA design standpoint. > >I also think it is sensible to focus this interface on simple SRAM >FPGAs, not FLASH based stuff, or whatever complex device required a >byte code interpreter (never heard of that before). > >Jason -- Sent from my mobile phone. Please pardon brevity and lack of formatting. -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
