Re: [PATCH] arm64: Subscribe Microsoft Azure Cobalt 100 to ARM Neoverse N2 errata

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On Tue, Feb 13, 2024 at 04:19:08PM -0800, Easwar Hariharan wrote:
> >> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> >> index 7c7493cb571f..a632a7514e55 100644
> >> --- a/arch/arm64/include/asm/cputype.h
> >> +++ b/arch/arm64/include/asm/cputype.h
> >> @@ -61,6 +61,7 @@
> >>  #define ARM_CPU_IMP_HISI		0x48
> >>  #define ARM_CPU_IMP_APPLE		0x61
> >>  #define ARM_CPU_IMP_AMPERE		0xC0
> >> +#define ARM_CPU_IMP_MICROSOFT		0x6D
> >>  
> >>  #define ARM_CPU_PART_AEM_V8		0xD0F
> >>  #define ARM_CPU_PART_FOUNDATION		0xD00
> >> @@ -135,6 +136,8 @@
> >>  
> >>  #define AMPERE_CPU_PART_AMPERE1		0xAC3
> >>  
> >> +#define MSFT_CPU_PART_AZURE_COBALT_100	0xD49 /* Based on r0p0 of ARM Neoverse N2 */
> >> +
> >>  #define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)
> >>  #define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)
> >>  #define MIDR_CORTEX_A72 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72)
> >> @@ -193,6 +196,7 @@
> >>  #define MIDR_APPLE_M2_BLIZZARD_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_MAX)
> >>  #define MIDR_APPLE_M2_AVALANCHE_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_MAX)
> >>  #define MIDR_AMPERE1 MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1)
> >> +#define MIDR_MICROSOFT_AZURE_COBALT_100 MIDR_CPU_MODEL(ARM_CPU_IMP_MICROSOFT, MSFT_CPU_PART_AZURE_COBALT_100)
> > 
> > nitpick: consistently use the abbreviated 'MSFT' for all the definitions
> > you're adding.
> 
> I was rather hoping to use Microsoft throughout, but I chose MSFT for the CPU_PART* to align columns
> with the other defines. :) If consistency is of a higher priority than column alignment, I can change it
> to MICROSOFT rather than MSFT throughout.

Consistency across the definitions is more important than alignmen; please
choose either "MSFT" or "MICROSOFT" and use that consistently.

Mark.




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