On Mon, Jan 8, 2024 at 11:51 PM Atish Patra <atishp@xxxxxxxxxxxxxx> wrote:
>
> On Mon, Jan 8, 2024 at 6:20 PM Charlie Jenkins <charlie@xxxxxxxxxxxx> wrote:
> >
> > On Mon, Jan 08, 2024 at 05:24:47PM -0800, Atish Patra wrote:
> > > On Mon, Jan 8, 2024 at 10:42 AM Charlie Jenkins <charlie@xxxxxxxxxxxx> wrote:
> > > >
> > > > Provide documentation that explains how to properly do CMODX in riscv.
> > > >
> > > > Signed-off-by: Charlie Jenkins <charlie@xxxxxxxxxxxx>
> > > > ---
> > > > Documentation/arch/riscv/cmodx.rst | 88 ++++++++++++++++++++++++++++++++++++++
> > > > Documentation/arch/riscv/index.rst | 1 +
> > > > 2 files changed, 89 insertions(+)
> > > >
> > > > diff --git a/Documentation/arch/riscv/cmodx.rst b/Documentation/arch/riscv/cmodx.rst
> > > > new file mode 100644
> > > > index 000000000000..afd7086c222c
> > > > --- /dev/null
> > > > +++ b/Documentation/arch/riscv/cmodx.rst
> > > > @@ -0,0 +1,88 @@
> > > > +.. SPDX-License-Identifier: GPL-2.0
> > > > +
> > > > +==============================================================================
> > > > +Concurrent Modification and Execution of Instructions (CMODX) for RISC-V Linux
> > > > +==============================================================================
> > > > +
> > > > +CMODX is a programming technique where a program executes instructions that were
> > > > +modified by the program itself. Instruction storage and the instruction cache
> > > > +(icache) are not guaranteed to be synchronized on RISC-V hardware. Therefore, the
> > > > +program must enforce its own synchronization with the unprivileged fence.i
> > > > +instruction.
> > > > +
> > > > +However, the default Linux ABI prohibits the use of fence.i in userspace
> > > > +applications. At any point the scheduler may migrate a task onto a new hart. If
> > > > +migration occurs after the userspace synchronized the icache and instruction
> > > > +storage with fence.i, the icache will no longer be clean. This is due to the
> > > > +behavior of fence.i only affecting the hart that it is called on. Thus, the hart
> > > > +that the task has been migrated to may not have synchronized instruction storage
> > > > +and icache.
> > > > +
> > > > +There are two ways to solve this problem: use the riscv_flush_icache() syscall,
> > > > +or use the ``PR_RISCV_SET_ICACHE_FLUSH_CTX`` prctl() and emit fence.i in
> > > > +userspace. The syscall performs a one-off icache flushing operation. The prctl
> > > > +changes the Linux ABI to allow userspace to emit icache flushing operations.
> > > > +
> > > > +prctl() Interface
> > > > +---------------------
> > > > +
> > > > +Call prctl() with ``PR_RISCV_SET_ICACHE_FLUSH_CTX`` as the first argument. The
> > > > +remaining arguments will be delegated to the riscv_set_icache_flush_ctx
> > > > +function detailed below.
> > > > +
> > > > +.. kernel-doc:: arch/riscv/mm/cacheflush.c
> > > > + :identifiers: riscv_set_icache_flush_ctx
> > > > +
> > >
> > > Document the arguments of the prctl as well ?
> >
> > Do you mean to include the ``PR_RISCV_SET_ICACHE_FLUSH_CTX`` key in the
> > comment of riscv_set_icache_flush_ctx? The args to
> > riscv_set_icache_flush_ctx are the args to the prctl except for the key.
> >
>
> No, I mean describe the argument2(ctx) and argument3(per_thread) as well.
> Since this is a documentation of the new prctl, we should document all
> args so that an user
> can use it without grepping through the kernel sources.
>
Never mind. I missed the identifiers tag for kernel doc. Thanks for
the reminder.
The patch looks good to me.
Reviewed-by: Atish Patra <atishp@xxxxxxxxxxxx>
> > - Charlie
> >
> > >
> > > > +Example usage:
> > > > +
> > > > +The following files are meant to be compiled and linked with each other. The
> > > > +modify_instruction() function replaces an add with 0 with an add with one,
> > > > +causing the instruction sequence in get_value() to change from returning a zero
> > > > +to returning a one.
> > > > +
> > > > +cmodx.c::
> > > > +
> > > > + #include <stdio.h>
> > > > + #include <sys/prctl.h>
> > > > +
> > > > + extern int get_value();
> > > > + extern void modify_instruction();
> > > > +
> > > > + int main()
> > > > + {
> > > > + int value = get_value();
> > > > + printf("Value before cmodx: %d\n", value);
> > > > +
> > > > + // Call prctl before first fence.i is called inside modify_instruction
> > > > + prctl(PR_RISCV_SET_ICACHE_FLUSH_CTX_ON, PR_RISCV_CTX_SW_FENCEI, 0);
> > > > + modify_instruction();
> > > > +
> > > > + value = get_value();
> > > > + printf("Value after cmodx: %d\n", value);
> > > > + return 0;
> > > > + }
> > > > +
> > > > +cmodx.S::
> > > > +
> > > > + .option norvc
> > > > +
> > > > + .text
> > > > + .global modify_instruction
> > > > + modify_instruction:
> > > > + lw a0, new_insn
> > > > + lui a5,%hi(old_insn)
> > > > + sw a0,%lo(old_insn)(a5)
> > > > + fence.i
> > > > + ret
> > > > +
> > > > + .section modifiable, "awx"
> > > > + .global get_value
> > > > + get_value:
> > > > + li a0, 0
> > > > + old_insn:
> > > > + addi a0, a0, 0
> > > > + ret
> > > > +
> > > > + .data
> > > > + new_insn:
> > > > + addi a0, a0, 1
> > > > diff --git a/Documentation/arch/riscv/index.rst b/Documentation/arch/riscv/index.rst
> > > > index 4dab0cb4b900..eecf347ce849 100644
> > > > --- a/Documentation/arch/riscv/index.rst
> > > > +++ b/Documentation/arch/riscv/index.rst
> > > > @@ -13,6 +13,7 @@ RISC-V architecture
> > > > patch-acceptance
> > > > uabi
> > > > vector
> > > > + cmodx
> > > >
> > > > features
> > > >
> > > >
> > > > --
> > > > 2.43.0
> > > >
> > >
> > >
> > > --
> > > Regards,
> > > Atish
>
>
>
> --
> Regards,
> Atish
--
Regards,
Atish
