> > Am not very comfortable with this idea. > > > > As there is no guarantee that the interrupt number/memory map and the > > i2c numbering will be same in future SOCs or other IPs. > > > > You might be already aware that the number of i2cs on each SOC are > > different as example on STiH415 we have 10 SSCs and on STiH416 we have > > 11 SSCs. So, At what point you decide that which devices/IPs should be > > in stih41x and which should in stih415/Stih416? > Yes, I know there is one more SSC on STiH416. > > On one hand, this could add some confusion. But on the other hand, > someone who will need to activate a SSP will know which one he has > to activate. > > > Each i2c node will save around 5 lines if we common it up, but if the > > interrupt number or map changes this difference will be negligible. > > > > Common up at this level and mixing un-common ones in stih415.dtsi or > > stih416.dtsi will add confusion to readers as the information is split > > at multiple places. > I agree it will be messy if one part of the node declared at one place, > and the rest at another place. > > > > IMO the common up idea sounds good but reduces the readability and has > > no effect on final dtb size. > > Fair enough. Lee, are you ok with keeping it as is? To be honest I haven't taken a look at the layout of the dts[i] files yet, so I can't really comment. Srini knows then better than anyone, so if he says it doesn't make sense, then I'm happy to take his word for it. -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
