On Sat, Dec 16, 2023 at 06:30:00PM +0100, Andrew Lunn wrote: > > The following is the chip package, the chip can work on the switch mode > > like the existed upstream code qca8k, where PHY1-PHY4 is connected with > > MAC1-MAC4 directly; The chip can also work on the PHY mode, where PHY1- > > PHY4 is connected with PCS1 by 10g-qxgmii; Either switch mode or PHY mode, > > the PHY4 is optionally connected with PCS0 by SGMII, PCS0 and PCS1 > > are connected with the SoC(IPQ platform) PCSes. > > I don't really understand. Are you saying the hardware is actually : > > > +----------------------------------------------+ > | PCS1 PCS0 | > | | > | MAC0 MAC5 | > | | | | > | +-----+--------------+-------------+ | > | | | | > | | Switch | | > | | | | > | +-+---------+---------+---------+--+ | > | | | | | | > | MAC1 MAC2 MAC3 MAC4 | > | | > | PHY1 PHY2 PHY3 PHY4 | > +----------------------------------------------+ > > When in PHY mode, the switch is hard coded to map the 4 PCS1 channels > straight to MAC1-MAC4 and all switch functionality is disabled. But > then in switch mode, the switch can be controlled as a DSA switch? The > 10G PCS1 is then a single 10G port, not 4x 2.5G? > > Is there a product brief for this PHY? That might help us understand > this hardware? Not even digikey give any clues what "QCA8084" is - they list it as "unclassified" and give no documentation and no photo. Basically it seems to be a super secret device. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
