On 11/27/2023 1:20 AM, Andrew Lunn wrote:
On Sun, Nov 26, 2023 at 02:07:27PM +0800, Luo Jie wrote:
From: Vladimir Oltean <vladimir.oltean@xxxxxxx>
10G-QXGMII is a MAC-to-PHY interface defined by the USXGMII multiport
specification. It uses the same signaling as USXGMII, but it multiplexes
4 ports over the link, resulting in a maximum speed of 2.5G per port.
Some in-tree SoCs like the NXP LS1028A use "usxgmii" when they mean
either the single-port USXGMII or the quad-port 10G-QXGMII variant, and
they could get away just fine with that thus far. But there is a need to
distinguish between the 2 as far as SerDes drivers are concerned.
Can this is split into two patches?
This patch is a single logical for introducing the mode 10g-qxgmii,
looks it's better to keep it within a single patch.
switch (interface) {
case PHY_INTERFACE_MODE_USXGMII:
- caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
+ caps |= MAC_10000FD | MAC_5000FD;
+ fallthrough;
This change seems to refer to the second paragraph, where as the rest
of the code is about the first. Or does splitting this cause a bisect
problem?
Andrew
Since the caps change is related to the new added interface mode
10g-qxgmii, it is reasonable to keep the changes integrated here.
