On Tue, Nov 14, 2023, Xin3 Li wrote: > > Implement what in a different way? The VMCS fields and FRED are architectural. > > The internal layout of the VMCS is uarch specific, but the encodings and semantics > > absolutely cannot change without breaking software. And if Intel does something > > asinine like make a control active-low then we have far, far bigger problems. > > I should have made it clear that I wasn't talking at the ISA level. And > of course CPU uarch implementations should be transparent to software. > > I mean a CPU uarch could choose to check the activation bit in the VM exit > controls first and then decide whether to load the 2nd VM exit controls. > While if resources allow, a CPU uarch could always load the 2nd VM exit > controls. And why does that matter? Loading a field speculatively/out-of-order is fine, consuming it when it architecturally is supposed to be ignored is not.
