On lunedì 7 agosto 2023 12:50:10 CEST Mike Rapoport wrote: > Hi Fabio, > > On Fri, Jul 28, 2023 at 01:53:01PM +0200, Fabio M. De Francesco wrote: > > Extend page_tables.rst by adding a section about the role of MMU and TLB > > in translating between virtual addresses and physical page frames. > > Furthermore explain the concept behind Page Faults and how the Linux > > kernel handles TLB misses. Finally briefly explain how and why to disable > > the page faults handler. > > > > [snip] > > > > +MMU, TLB, and Page Faults > > +========================= > > + > > +The `Memory Management Unit (MMU)` is a hardware component that handles > > virtual +to physical address translations. It may use relatively small > > caches in hardware +called `Translation Lookaside Buffers (TLBs)` and `Page > > Walk Caches` to speed up +these translations. > > + > > +When a process wants to access a memory location, the CPU provides a > > virtual > > +address to the MMU, which then uses the MMU to check access permissions and > > +dirty bits, and if possible it resolves the physical address and consents > > the +requested type of access to the corresponding physical address. > > Essentially any access to a memory location involves the translation from > virtual to physical, not only when processes access memory. Mike, I'm cutting everything from here on because I agree with your comments, so I could just write a long list of 'I agree', 'I understand' and the like. I want to avoid readers from the aforementioned list :-) I think (actually, I hope) that I have understood everything correctly. I will send a new version with the necessary corrections by the end of this week. Thanks again for your comments and suggestions. Fabio
