Re: [RFC PATCH v1 09/21] RISC-V: cacheflush: Initialize CBO variables on ACPI systems

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To: Sunil V L <sunilvl@xxxxxxxxxxxxxxxx>
Subject: Re: [RFC PATCH v1 09/21] RISC-V: cacheflush: Initialize CBO variables on ACPI systems
From: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
Date: Fri, 4 Aug 2023 08:56:29 +0300
Cc: linux-doc@xxxxxxxxxxxxxxx, linux-riscv@xxxxxxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, linux-acpi@xxxxxxxxxxxxxxx, linux-pci@xxxxxxxxxxxxxxx, Jonathan Corbet <corbet@xxxxxxx>, Paul Walmsley <paul.walmsley@xxxxxxxxxx>, Palmer Dabbelt <palmer@xxxxxxxxxxx>, Albert Ou <aou@xxxxxxxxxxxxxxxxx>, Catalin Marinas <catalin.marinas@xxxxxxx>, Will Deacon <will@xxxxxxxxxx>, "Rafael J . Wysocki" <rafael@xxxxxxxxxx>, Len Brown <lenb@xxxxxxxxxx>, Daniel Scally <djrscally@xxxxxxxxx>, Heikki Krogerus <heikki.krogerus@xxxxxxxxxxxxxxx>, Sakari Ailus <sakari.ailus@xxxxxxxxxxxxxxx>, Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>, Daniel Lezcano <daniel.lezcano@xxxxxxxxxx>, Thomas Gleixner <tglx@xxxxxxxxxxxxx>, Anup Patel <anup@xxxxxxxxxxxxxx>, Marc Zyngier <maz@xxxxxxxxxx>, Bjorn Helgaas <bhelgaas@xxxxxxxxxx>, Robert Moore <robert.moore@xxxxxxxxx>, Haibo Xu <haibo1.xu@xxxxxxxxx>, Andrew Jones <ajones@xxxxxxxxxxxxxxxx>, Conor Dooley <conor.dooley@xxxxxxxxxxxxx>, Atish Kumar Patra <atishp@xxxxxxxxxxxx>
In-reply-to: <20230803175916.3174453-10-sunilvl@ventanamicro.com>
Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
References: <20230803175916.3174453-1-sunilvl@ventanamicro.com> <20230803175916.3174453-10-sunilvl@ventanamicro.com>

On Thu, Aug 03, 2023 at 11:29:04PM +0530, Sunil V L wrote:
> Using new interface to get the CBO block size information in
> RHCT, initialize the variables on ACPI platforms.

...

>  #include <linux/of.h>
> +#include <linux/acpi.h>

Can you keep it sorted (to some extent)?

> +#include <asm/acpi.h>

What do you need this for?

>  #include <asm/cacheflush.h>

-- 
With Best Regards,
Andy Shevchenko

Follow-Ups:
- Re: [RFC PATCH v1 09/21] RISC-V: cacheflush: Initialize CBO variables on ACPI systems
  - From: Sunil V L

References:
- [RFC PATCH v1 00/21] RISC-V: ACPI: Add external interrupt controller support
  - From: Sunil V L
- [RFC PATCH v1 09/21] RISC-V: cacheflush: Initialize CBO variables on ACPI systems
  - From: Sunil V L

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