On 7/20/23 3:58 PM, Jim Mattson wrote:
On Thu, Jul 20, 2023 at 12:48 PM Kim Phillips <kim.phillips@xxxxxxx> wrote:
Unlike Intel's Enhanced IBRS feature, AMD's Automatic IBRS does not
provide protection to processes running at CPL3/user mode [1].
Explicitly enable STIBP to protect against cross-thread CPL3
branch target injections on systems with Automatic IBRS enabled.
Is there any performance penalty to enabling STIBP + AUTOIBRS, aside
from the lost sharing?
Not to my knowledge.
Or does this just effectively tag the branch
prediction information with thread ID?
I don't know the implementation, but AFAIK, AUTOIBRS and STIBP
are independent of each other.
Thanks,
Kim
