Hi Peter,
My 2 cents:
On 2023/5/10 17:27, Peter Zijlstra wrote:
On Wed, May 10, 2023 at 05:16:46PM +0800, Youling Tang wrote:
Add jump-label implementation based on the ARM64 version.
Signed-off-by: Youling Tang <tangyouling@xxxxxxxxxxx>
<snip>
+ if (type == JUMP_LABEL_JMP)
+ insn = larch_insn_gen_b(jump_entry_code(entry), jump_entry_target(entry));
+ else
+ insn = larch_insn_gen_nop();
+
+ larch_insn_patch_text(addr, insn);
+}
This all implies Loongarch is fine with the nop<->b transition (much
like arm64 is), but I found no actual mention of what transitions are
valid for the architecture in your inst.c file -- perhaps you could put
a small comment there to elucidate the occasional reader that doesn't
have your arch manual memorized?
Do you mean by "valid transition" something like "what kind of
self-modification is architecturally sound, taking ICache /
micro-architecture behavior etc. into consideration"? If so, I'd say
things would be fine in LoongArch as long as an instruction fetch
barrier is used. Maybe Youling can confirm and mention this in the next
revision.
--
WANG "xen0n" Xuerui
Linux/LoongArch mailing list: https://lore.kernel.org/loongarch/
