On Mon, Feb 27, 2023 at 10:18 AM Lucas Tanure <lucas.tanure@xxxxxxxxxxxxx> wrote: > > I am assisting with PCIe and networking bring-up for Rock Pi 5B (RK3588). > This chip uses the same GICv3 as RK356X but has fixed the previous > limitation of GIC only supporting 32-bit addresses. > > But the implementation decision for shareability in GICR and GITS is > still the same. > > I read the previous thread about this topic: > https://lore.kernel.org/lkml/2791594e-db60-e1d0-88e5-7e5bbd98ae4d@xxxxxxxxxxxxxx/T/#m5dbc70ff308d81e98dd0d797e23d3fbf9c353245 > > From my understanding, the errata numbers Marc Zyngier is referring to > are found in Arm errata documents at developer.arm.com/documentation. > But I could not find Cavium or Broadcom pages for errata with those > numbers in Documentation/arm64/silicon-errata.rst > > I could not find an errata document about this shareability issue, > and by what Kever said in the previous thread this could be a > RockChip design decision. > > Marc, as I could only find ARM errata numbers, is the errata number > you were expecting generated by ARM only, or RockChip should issue > a document like Arm to detail the issue? > > Can this shareability issue be seen as a quirk without an > errata number? > > The following patch is based on the work of Peter Geis for the > Quartz64 board and the previous thread feedback. I see you have included rk356x in this as well. This will only work on rk356x boards that do not exceed 4GB of ram as the on chip devices are only 32bit addressable and the kernel by default allocates this in highmem. Very Respectfully, Peter Geis > > Lucas Tanure (1): > irqchip/gic-v3: Add RK3588 GICR and GITS no share workaround > > Documentation/arm64/silicon-errata.rst | 4 +++ > arch/arm64/Kconfig | 13 ++++++++ > drivers/irqchip/irq-gic-v3-its.c | 42 ++++++++++++++++++++++++++ > 3 files changed, 59 insertions(+) > > -- > 2.39.2 >
