Ping? On Mon, Feb 13, 2023 at 05:44:47PM +0200, Mike Rapoport wrote: > From: "Mike Rapoport (IBM)" <rppt@xxxxxxxxxx> > > Add an example of memory layout with interleaving nodes where even memory > banks belong to node 0 and odd memory banks belong to node 1 > > Suggested-by: Michal Hocko <mhocko@xxxxxxxxxx> > Signed-off-by: Mike Rapoport (IBM) <rppt@xxxxxxxxxx> > --- > > v3: > * Fix typos and wording (Matthew) > > v2: https://lore.kernel.org/all/20230212095445.1311627-1-rppt@xxxxxxxxxx > * Wording update (Bagas) > * Add forgotten Suggested-by > > v1: https://lore.kernel.org/all/20230211102207.1267058-1-rppt@xxxxxxxxxx > Documentation/mm/physical_memory.rst | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/Documentation/mm/physical_memory.rst b/Documentation/mm/physical_memory.rst > index 3f3c02aa6e6e..863ddcd0b291 100644 > --- a/Documentation/mm/physical_memory.rst > +++ b/Documentation/mm/physical_memory.rst > @@ -114,6 +114,25 @@ RAM equally split between two nodes, there will be ``ZONE_DMA32``, > | DMA32 | NORMAL | MOVABLE | | NORMAL | MOVABLE | > +---------+----------+-----------+ +------------+-------------+ > > + > +Memory banks may belong to interleaving nodes. In the example below an x86 > +machine has 16 Gbytes of RAM in 4 memory banks, even banks belong to node 0 > +and odd banks belong to node 1:: > + > + > + 0 4G 8G 12G 16G > + +-------------+ +-------------+ +-------------+ +-------------+ > + | node 0 | | node 1 | | node 0 | | node 1 | > + +-------------+ +-------------+ +-------------+ +-------------+ > + > + 0 16M 4G > + +-----+-------+ +-------------+ +-------------+ +-------------+ > + | DMA | DMA32 | | NORMAL | | NORMAL | | NORMAL | > + +-----+-------+ +-------------+ +-------------+ +-------------+ > + > +In this case node 0 will span from 0 to 12 Gbytes and node 1 will span from > +4 to 16 Gbytes. > + > .. _nodes: > > Nodes > > base-commit: e076f253283c3e55a128fa9665c0e6cd8146948d > -- > 2.35.1 > -- Sincerely yours, Mike.
