On Mon, Jan 09, 2023 at 10:54:56PM +0200, Andy Shevchenko wrote:
> diff --git a/Documentation/driver-api/pin-control.rst b/Documentation/driver-api/pin-control.rst
> index 0022e930e93e..0274313e9997 100644
> --- a/Documentation/driver-api/pin-control.rst
> +++ b/Documentation/driver-api/pin-control.rst
> @@ -11,7 +11,7 @@ This subsystem deals with:
> - Multiplexing of pins, pads, fingers (etc) see below for details
>
> - Configuration of pins, pads, fingers (etc), such as software-controlled
> - biasing and driving mode specific pins, such as pull-up/down, open drain,
> + biasing and driving mode specific pins, such as pull-up, pull-down, open drain,
> load capacitance etc.
>
> Top-level interface
Immediately there is two "Define foo"s, which should have been like:
---- >8 ----
diff --git a/Documentation/driver-api/pin-control.rst b/Documentation/driver-api/pin-control.rst
index 22a82ee23a4156..57dd75fa091661 100644
--- a/Documentation/driver-api/pin-control.rst
+++ b/Documentation/driver-api/pin-control.rst
@@ -17,14 +17,12 @@ This subsystem deals with:
Top-level interface
===================
-Definition of PIN CONTROLLER:
+Definitions:
-- A pin controller is a piece of hardware, usually a set of registers, that
+- A PIN CONTROLLER is a piece of hardware, usually a set of registers, that
can control PINs. It may be able to multiplex, bias, set load capacitance,
set drive strength, etc. for individual pins or groups of pins.
-Definition of PIN:
-
- PINS are equal to pads, fingers, balls or whatever packaging input or
output line you want to control and these are denoted by unsigned integers
in the range 0..maxpin. This numberspace is local to each PIN CONTROLLER, so
> @@ -95,7 +96,7 @@ this in our driver::
> To enable the pinctrl subsystem and the subgroups for PINMUX and PINCONF and
> selected drivers, you need to select them from your machine's Kconfig entry,
> since these are so tightly integrated with the machines they are used on.
> -See for example arch/arm/mach-ux500/Kconfig for an example.
> +See arch/arm/mach-ux500/Kconfig for an example.
>
> Pins usually have fancier names than this. You can find these in the datasheet
> for your chip. Notice that the core pinctrl.h file provides a fancy macro
Don't use "I" for technical documentation like this:
---- >8 ----
diff --git a/Documentation/driver-api/pin-control.rst b/Documentation/driver-api/pin-control.rst
index 57dd75fa091661..214a84e5a723c0 100644
--- a/Documentation/driver-api/pin-control.rst
+++ b/Documentation/driver-api/pin-control.rst
@@ -98,16 +98,16 @@ See arch/arm/mach-ux500/Kconfig for an example.
Pins usually have fancier names than this. You can find these in the datasheet
for your chip. Notice that the core pinctrl.h file provides a fancy macro
-called PINCTRL_PIN() to create the struct entries. As you can see I enumerated
-the pins from 0 in the upper left corner to 63 in the lower right corner.
+called PINCTRL_PIN() to create the struct entries. As you can see the pins are
+enumerated from 0 in the upper left corner to 63 in the lower right corner.
This enumeration was arbitrarily chosen, in practice you need to think
through your numbering system so that it matches the layout of registers
and such things in your driver, or the code may become complicated. You must
also consider matching of offsets to the GPIO ranges that may be handled by
the pin controller.
-For a padring with 467 pads, as opposed to actual pins, I used an enumeration
-like this, walking around the edge of the chip, which seems to be industry
+For a padding with 467 pads, as opposed to actual pins, the enumeration will
+be like this, walking around the edge of the chip, which seems to be industry
standard too (all these pads had names, too)::
Also, I need to align numbers and change vertices to lines (dashes and pipes)
in the enumeration loop diagram:
---- >8 ----
diff --git a/Documentation/driver-api/pin-control.rst b/Documentation/driver-api/pin-control.rst
index 214a84e5a723c0..e4938c28af14fb 100644
--- a/Documentation/driver-api/pin-control.rst
+++ b/Documentation/driver-api/pin-control.rst
@@ -106,17 +106,17 @@ and such things in your driver, or the code may become complicated. You must
also consider matching of offsets to the GPIO ranges that may be handled by
the pin controller.
-For a padding with 467 pads, as opposed to actual pins, the enumeration will
-be like this, walking around the edge of the chip, which seems to be industry
-standard too (all these pads had names, too)::
+For a padding with 467 pads, as opposed to actual pins, the enumeration will be
+like a closed loop: walking around the edge of the chip, which seems to be
+industry standard too (all these pads also had names)::
- 0 ..... 104
- 466 105
- . .
- . .
- 358 224
- 357 .... 225
+ 0 ----- 104
+ 466 105
+ | |
+ | |
+ 358 224
+ 357 ----- 225
Pin groups
> The pin configuration driver implements callbacks for changing pin
> -configuration in the pin controller ops like this::
> +configuration in the pin controller ops like this:
> +
> +.. code-block:: c
>
> - #include <linux/pinctrl/pinctrl.h>
> #include <linux/pinctrl/pinconf.h>
> + #include <linux/pinctrl/pinctrl.h>
> +
> #include "platform_x_pindefs.h"
>
> static int foo_pin_config_get(struct pinctrl_dev *pctldev,
> - unsigned offset,
> - unsigned long *config)
> + unsigned int offset,
> + unsigned long *config)
> {
> struct my_conftype conf;
>
> @@ -235,28 +226,28 @@ configuration in the pin controller ops like this::
> }
>
> static int foo_pin_config_set(struct pinctrl_dev *pctldev,
> - unsigned offset,
> - unsigned long config)
> + unsigned int offset,
> + unsigned long config)
> {
> struct my_conftype *conf = (struct my_conftype *) config;
>
> switch (conf) {
> case PLATFORM_X_PULL_UP:
> ...
> - }
> + break;
> }
> }
>
> - static int foo_pin_config_group_get (struct pinctrl_dev *pctldev,
> - unsigned selector,
> - unsigned long *config)
> + static int foo_pin_config_group_get(struct pinctrl_dev *pctldev,
> + unsigned selector,
> + unsigned long *config)
> {
> ...
> }
>
> - static int foo_pin_config_group_set (struct pinctrl_dev *pctldev,
> - unsigned selector,
> - unsigned long config)
> + static int foo_pin_config_group_set(struct pinctrl_dev *pctldev,
> + unsigned selector,
> + unsigned long config)
> {
> ...
> }
Sphinx reports:
Documentation/driver-api/pin-control.rst:210: WARNING: Could not lex literal_block as "c". Highlighting skipped.
I have to comment out "Find setting" comment:
---- >8 ----
diff --git a/Documentation/driver-api/pin-control.rst b/Documentation/driver-api/pin-control.rst
index 0274313e999722..22a82ee23a4156 100644
--- a/Documentation/driver-api/pin-control.rst
+++ b/Documentation/driver-api/pin-control.rst
@@ -220,7 +220,7 @@ configuration in the pin controller ops like this:
{
struct my_conftype conf;
- ... Find setting for pin @ offset ...
+ /* ... Find setting for pin @ offset ... */
*config = (unsigned long) conf;
}
> @@ -378,7 +380,7 @@ will get a pin number into its handled number range. Further it is also passed
> the range ID value, so that the pin controller knows which range it should
> deal with.
>
> -Calling pinctrl_add_gpio_range from pinctrl driver is DEPRECATED. Please see
> +Calling pinctrl_add_gpio_range() from pinctrl driver is DEPRECATED. Please see
> section 2.1 of Documentation/devicetree/bindings/gpio/gpio.txt on how to bind
> pinctrl and gpio drivers.
>
On "Pinmux conventions" subsection, the term "Definitions" is a misnomer for
convention lists, so I have to correct that:
---- >8 ----
diff --git a/Documentation/driver-api/pin-control.rst b/Documentation/driver-api/pin-control.rst
index e4938c28af14fb..95333dadcbdd08 100644
--- a/Documentation/driver-api/pin-control.rst
+++ b/Documentation/driver-api/pin-control.rst
@@ -466,7 +466,7 @@ in your machine configuration. It is inspired by the clk, GPIO and regulator
subsystems, so devices will request their mux setting, but it's also possible
to request a single pin for e.g. GPIO.
-Definitions:
+The conventions are:
- FUNCTIONS can be switched in and out by a driver residing with the pin
control subsystem in the drivers/pinctrl/* directory of the kernel. The
> Debugfs files
> =============
> +
> These files are created in ``/sys/kernel/debug/pinctrl``:
>
> - ``pinctrl-devices``: prints each pin controller device along with columns to
> @@ -1440,7 +1428,7 @@ These files are created in ``/sys/kernel/debug/pinctrl``:
> - ``pinctrl-handles``: prints each configured pin controller handle and the
> corresponding pinmux maps
>
> -- ``pinctrl-maps``: print all pinctrl maps
> +- ``pinctrl-maps``: prints all pinctrl maps
>
> A sub-directory is created inside of ``/sys/kernel/debug/pinctrl`` for each pin
> controller device containing these files:
> @@ -1448,20 +1436,22 @@ controller device containing these files:
> - ``pins``: prints a line for each pin registered on the pin controller. The
> pinctrl driver may add additional information such as register contents.
>
> -- ``gpio-ranges``: print ranges that map gpio lines to pins on the controller
> +- ``gpio-ranges``: prints ranges that map gpio lines to pins on the controller
>
> -- ``pingroups``: print all pin groups registered on the pin controller
> +- ``pingroups``: prints all pin groups registered on the pin controller
>
> -- ``pinconf-pins``: print pin config settings for each pin
> +- ``pinconf-pins``: prints pin config settings for each pin
>
> -- ``pinconf-groups``: print pin config settings per pin group
> +- ``pinconf-groups``: prints pin config settings per pin group
>
> -- ``pinmux-functions``: print each pin function along with the pin groups that
> +- ``pinmux-functions``: prints each pin function along with the pin groups that
> map to the pin function
>
> -- ``pinmux-pins``: iterate through all pins and print mux owner, gpio owner
> +- ``pinmux-pins``: iterates through all pins and prints mux owner, gpio owner
> and if the pin is a hog
>
> -- ``pinmux-select``: write to this file to activate a pin function for a group::
> +- ``pinmux-select``: write to this file to activate a pin function for a group:
> +
> + .. code-block:: sh
>
> echo "<group-name function-name>" > pinmux-select
Code keywords (variables, function names, file paths) are inlined here but
not on elsewhere in this doc, so I have to inline the remaining keywords:
---- >8 ----
diff --git a/Documentation/driver-api/pin-control.rst b/Documentation/driver-api/pin-control.rst
index 95333dadcbdd08..7ef6da61ea8da2 100644
--- a/Documentation/driver-api/pin-control.rst
+++ b/Documentation/driver-api/pin-control.rst
@@ -94,17 +94,17 @@ this in our driver:
To enable the pinctrl subsystem and the subgroups for PINMUX and PINCONF and
selected drivers, you need to select them from your machine's Kconfig entry,
since these are so tightly integrated with the machines they are used on.
-See arch/arm/mach-ux500/Kconfig for an example.
+See ``arch/arm/mach-ux500/Kconfig`` for an example.
Pins usually have fancier names than this. You can find these in the datasheet
for your chip. Notice that the core pinctrl.h file provides a fancy macro
-called PINCTRL_PIN() to create the struct entries. As you can see the pins are
-enumerated from 0 in the upper left corner to 63 in the lower right corner.
-This enumeration was arbitrarily chosen, in practice you need to think
-through your numbering system so that it matches the layout of registers
-and such things in your driver, or the code may become complicated. You must
-also consider matching of offsets to the GPIO ranges that may be handled by
-the pin controller.
+called ``PINCTRL_PIN()`` to create the struct entries. As you can see the pins
+are enumerated from 0 in the upper left corner to 63 in the lower right corner.
+This enumeration was arbitrarily chosen, in practice you need to think through
+your numbering system so that it matches the layout of registers and such
+things in your driver, or the code may become complicated. You must also
+consider matching of offsets to the GPIO ranges that may be handled by the pin
+controller.
For a padding with 467 pads, as opposed to actual pins, the enumeration will be
like a closed loop: walking around the edge of the chip, which seems to be
@@ -131,7 +131,7 @@ on { 0, 8, 16, 24 }, and a group of pins dealing with an I2C interface on pins
on { 24, 25 }.
These two groups are presented to the pin control subsystem by implementing
-some generic pinctrl_ops like this:
+some generic ``pinctrl_ops`` like this:
.. code-block:: c
@@ -177,7 +177,7 @@ some generic pinctrl_ops like this:
.pctlops = &foo_pctrl_ops,
};
-The pin control subsystem will call the .get_groups_count() function to
+The pin control subsystem will call the ``.get_groups_count()`` function to
determine the total number of legal selectors, then it will call the other functions
to retrieve the name and pins of the group. Maintaining the data structure of
the groups is up to the driver, this is just a simple example - in practice you
@@ -199,7 +199,7 @@ unconnected.
Pin configuration can be programmed by adding configuration entries into the
mapping table; see section `Board/machine configuration`_ below.
-The format and meaning of the configuration parameter, PLATFORM_X_PULL_UP
+The format and meaning of the configuration parameter, ``PLATFORM_X_PULL_UP``
above, is entirely defined by the pin controller driver.
The pin configuration driver implements callbacks for changing pin
@@ -318,23 +318,23 @@ like this:
...
}
-So this complex system has one pin controller handling two different
-GPIO chips. "chip a" has 16 pins and "chip b" has 8 pins. The "chip a" and
-"chip b" have different .pin_base, which means a start pin number of the
+So this complex system has one pin controller handling two different GPIO
+chips. ``chip_a`` has 16 pins and ``chip_b`` has 8 pins. The ``chip a`` and
+``chip_b`` have different ``.pin_base``, which means a start pin number of the
GPIO range.
-The GPIO range of "chip a" starts from the GPIO base of 32 and actual
-pin range also starts from 32. However "chip b" has different starting
-offset for the GPIO range and pin range. The GPIO range of "chip b" starts
-from GPIO number 48, while the pin range of "chip b" starts from 64.
+The GPIO range of ``chip_a`` starts from the GPIO base of 32 and actual
+pin range also starts from 32. However ``chip_b`` has different starting
+offset for the GPIO range and pin range. The GPIO range of ``chip_b`` starts
+from GPIO number 48, while the pin range of ``chip b`` starts from 64.
-We can convert a gpio number to actual pin number using this "pin_base".
+We can convert a gpio number to actual pin number using this ``pin_base``.
They are mapped in the global GPIO pin space at:
-chip a:
+``chip_a``:
- GPIO range : [32 .. 47]
- pin range : [32 .. 47]
-chip b:
+``chip_b``:
- GPIO range : [48 .. 55]
- pin range : [64 .. 71]
@@ -355,9 +355,9 @@ numbers can be encoded in the range like this:
.gc = &chip,
};
-In this case the pin_base property will be ignored. If the name of a pin
+In this case the ``pin_base property`` will be ignored. If the name of a pin
group is known, the pins and npins elements of the above structure can be
-initialised using the function pinctrl_get_group_pins(), e.g. for pin
+initialised using the function ``pinctrl_get_group_pins()``, e.g. for pin
group "foo":
.. code-block:: c
@@ -378,15 +378,15 @@ will get a pin number into its handled number range. Further it is also passed
the range ID value, so that the pin controller knows which range it should
deal with.
-Calling pinctrl_add_gpio_range() from pinctrl driver is DEPRECATED. Please see
-section 2.1 of Documentation/devicetree/bindings/gpio/gpio.txt on how to bind
-pinctrl and gpio drivers.
+Calling ``pinctrl_add_gpio_range()`` from pinctrl driver is DEPRECATED. Please
+see section 2.1 of ``Documentation/devicetree/bindings/gpio/gpio.txt`` on how
+to bind pinctrl and gpio drivers.
PINMUX interfaces
=================
-These calls use the pinmux_* naming prefix. No other calls should use that
+These calls use the ``pinmux_*`` naming prefix. No other calls should use that
prefix.
@@ -469,7 +469,7 @@ to request a single pin for e.g. GPIO.
The conventions are:
- FUNCTIONS can be switched in and out by a driver residing with the pin
- control subsystem in the drivers/pinctrl/* directory of the kernel. The
+ control subsystem in the ``drivers/pinctrl/*`` directory of the kernel. The
pin control driver knows the possible functions. In the example above you can
identify three pinmux functions, one for spi, one for i2c and one for mmc.
@@ -513,9 +513,9 @@ The conventions are:
the core will simply select the first and only group available.)
In the example case we can define that this particular machine shall
- use device spi0 with pinmux function fspi0 group gspi0 and i2c0 on function
- fi2c0 group gi2c0, on the primary pin controller, we get mappings
- like these:
+ use device ``spi0`` with pinmux function ``fspi0`` group ``gspi0`` and
+ ``i2c0`` on function ``fi2c0`` group ``gi2c0``, on the primary pin
+ controller, we get mappings like these:
.. code-block:: c
@@ -571,8 +571,9 @@ is possible to perform the requested mux setting, poke the hardware so that
this happens.
Pinmux drivers are required to supply a few callback functions, some are
-optional. Usually the .set_mux() function is implemented, writing values into
-some certain registers to activate a certain mux setting for a certain pin.
+optional. Usually the ``.set_mux()`` function is implemented, writing values
+into some certain registers to activate a certain mux setting for a certain
+pin.
A simple driver for the above example will work by setting bits 0, 1, 2, 3, 4, or 5
into some register named MUX to select a certain function with a certain
@@ -696,19 +697,20 @@ All the above functions are mandatory to implement for a pinmux driver.
Pin control interaction with the GPIO subsystem
===============================================
-Note that the following implies that the use case is to use a certain pin
-from the Linux kernel using the API in <linux/gpio/consumer.h> with gpiod_get()
-and similar functions. There are cases where you may be using something
-that your datasheet calls "GPIO mode", but actually is just an electrical
-configuration for a certain device. See the section below named
+Note that the following implies that the use case is to use a certain pin from
+the Linux kernel using the API in ``<linux/gpio/consumer.h>`` with
+gpiod_get() and similar functions. There are cases where you may be using
+something that your datasheet calls "GPIO mode", but actually is just an
+electrical configuration for a certain device. See the section below named
`GPIO mode pitfalls`_ for more details on this scenario.
-The public pinmux API contains two functions named pinctrl_gpio_request()
-and pinctrl_gpio_free(). These two functions shall *ONLY* be called from
-gpiolib-based drivers as part of their .request() and .free() semantics.
-Likewise the pinctrl_gpio_direction_input()/pinctrl_gpio_direction_output()
-shall only be called from within respective .direction_input() /
-.direction_output() gpiolib implementation.
+The public pinmux API contains two functions named ``pinctrl_gpio_request()``
+and ``pinctrl_gpio_free()``. These two functions shall *ONLY* be called from
+gpiolib-based drivers as part of their ``.request()`` and ``.free()``
+semantics. Likewise the
+``pinctrl_gpio_direction_input()``/``pinctrl_gpio_direction_output()`` shall
+only be called from within respective ``.direction_input()`` /
+``.direction_output()`` gpiolib implementation.
NOTE that platforms and individual drivers shall *NOT* request GPIO pins to be
controlled e.g. muxed in. Instead, implement a proper gpiolib driver and have
@@ -722,8 +724,8 @@ In this case, the function array would become 64 entries for each GPIO
setting and then the device functions.
For this reason there are two functions a pin control driver can implement
-to enable only GPIO on an individual pin: .gpio_request_enable() and
-.gpio_disable_free().
+to enable only GPIO on an individual pin: ``.gpio_request_enable()`` and
+``.gpio_disable_free()``.
This function will pass in the affected GPIO range identified by the pin
controller core, so you know which GPIO pins are being affected by the request
@@ -731,27 +733,27 @@ operation.
If your driver needs to have an indication from the framework of whether the
GPIO pin shall be used for input or output you can implement the
-.gpio_set_direction() function. As described this shall be called from the
+``.gpio_set_direction()`` function. As described this shall be called from the
gpiolib driver and the affected GPIO range, pin offset and desired direction
will be passed along to this function.
Alternatively to using these special functions, it is fully allowed to use
-named functions for each GPIO pin, the pinctrl_gpio_request() will attempt to
-obtain the function "gpioN" where "N" is the global GPIO pin number if no
-special GPIO-handler is registered.
+named functions for each GPIO pin, the ``pinctrl_gpio_request()`` will attempt
+to obtain the function ``gpioN`` where ``N`` is the global GPIO pin number if
+no special GPIO-handler is registered.
GPIO mode pitfalls
==================
-Due to the naming conventions used by hardware engineers, where "GPIO"
-is taken to mean different things than what the kernel does, the developer
-may be confused by a datasheet talking about a pin being possible to set
-into "GPIO mode". It appears that what hardware engineers mean with
-"GPIO mode" is not necessarily the use case that is implied in the kernel
-interface <linux/gpio/consumer.h>: a pin that you grab from kernel code and then
-either listen for input or drive high/low to assert/deassert some
-external line.
+Due to the naming conventions used by hardware engineers, where "GPIO" is taken
+to mean different things than what the kernel does, the developer may be
+confused by a datasheet talking about a pin being possible to set into "GPIO
+mode". It appears that what hardware engineers mean with "GPIO mode" is not
+necessarily the use case that is implied in the kernel interface
+``<linux/gpio/consumer.h>``: a pin that you grab from kernel code and then
+either listen for input or drive high/low to assert/deassert some external
+line.
Rather hardware engineers think that "GPIO mode" means that you can
software-control a few electrical properties of the pin that you would
@@ -859,8 +861,8 @@ wake up and maybe even gpiod_get()/gpiod_put() as part of this cycle. This
all gets very complicated.
The solution is to not think that what the datasheet calls "GPIO mode"
-has to be handled by the <linux/gpio/consumer.h> interface. Instead view this as
-a certain pin config setting. Look in e.g. <linux/pinctrl/pinconf-generic.h>
+has to be handled by the ``<linux/gpio/consumer.h>`` interface. Instead view this as
+a certain pin config setting. Look in e.g. ``<linux/pinctrl/pinconf-generic.h>``
and you find this in the documentation:
PIN_CONFIG_OUTPUT:
@@ -1038,7 +1040,7 @@ Finally, some devices expect the mapping table to contain certain specific
named states. When running on hardware that doesn't need any pin controller
configuration, the mapping table must still contain those named states, in
order to explicitly indicate that the states were provided and intended to
-be empty. Table entry macro PIN_MAP_DUMMY_STATE serves the purpose of defining
+be empty. Table entry macro ``PIN_MAP_DUMMY_STATE`` serves the purpose of defining
a named state without causing any pin controller to be programmed:
.. code-block:: c
@@ -1163,7 +1165,7 @@ Pin control requests from drivers
=================================
When a device driver is about to probe the device core will automatically
-attempt to issue pinctrl_get_select_default() on these devices.
+attempt to issue ``pinctrl_get_select_default()`` on these devices.
This way driver writers do not need to add any of the boilerplate code
of the type found below. However when doing fine-grained state selection
and not using the "default" state, you may have to do some device driver
@@ -1181,8 +1183,8 @@ some cases where a driver needs to e.g. switch between different mux mappings
at runtime this is not possible.
A typical case is if a driver needs to switch bias of pins from normal
-operation and going to sleep, moving from the PINCTRL_STATE_DEFAULT to
-PINCTRL_STATE_SLEEP at runtime, re-biasing or even re-muxing pins to save
+operation and going to sleep, moving from the ``PINCTRL_STATE_DEFAULT`` to
+``PINCTRL_STATE_SLEEP`` at runtime, re-biasing or even re-muxing pins to save
current in sleep mode.
A driver may request a certain control state to be activated, usually just the
@@ -1228,49 +1230,49 @@ arrangement on your bus.
The semantics of the pinctrl APIs are:
-- pinctrl_get() is called in process context to obtain a handle to all pinctrl
- information for a given client device. It will allocate a struct from the
- kernel memory to hold the pinmux state. All mapping table parsing or similar
- slow operations take place within this API.
+- ``pinctrl_get()`` is called in process context to obtain a handle to all
+ pinctrl information for a given client device. It will allocate a struct from
+ the kernel memory to hold the pinmux state. All mapping table parsing or
+ similar slow operations take place within this API.
-- devm_pinctrl_get() is a variant of pinctrl_get() that causes pinctrl_put()
- to be called automatically on the retrieved pointer when the associated
- device is removed. It is recommended to use this function over plain
- pinctrl_get().
+- ``devm_pinctrl_get()`` is a variant of ``pinctrl_get()`` that causes
+ ``pinctrl_put()`` to be called automatically on the retrieved pointer when
+ the associated device is removed. It is recommended to use this function over
+ plain ``pinctrl_get()``.
-- pinctrl_lookup_state() is called in process context to obtain a handle to a
- specific state for a client device. This operation may be slow, too.
+- ``pinctrl_lookup_state()`` is called in process context to obtain a handle to
+ a specific state for a client device. This operation may be slow, too.
-- pinctrl_select_state() programs pin controller hardware according to the
+- ``pinctrl_select_state()`` programs pin controller hardware according to the
definition of the state as given by the mapping table. In theory, this is a
fast-path operation, since it only involved blasting some register settings
into hardware. However, note that some pin controllers may have their
registers on a slow/IRQ-based bus, so client devices should not assume they
- can call pinctrl_select_state() from non-blocking contexts.
+ can call ``pinctrl_select_state()`` from non-blocking contexts.
-- pinctrl_put() frees all information associated with a pinctrl handle.
+- ``pinctrl_put()`` frees all information associated with a pinctrl handle.
-- devm_pinctrl_put() is a variant of pinctrl_put() that may be used to
- explicitly destroy a pinctrl object returned by devm_pinctrl_get().
- However, use of this function will be rare, due to the automatic cleanup
- that will occur even without calling it.
+- ``devm_pinctrl_put()`` is a variant of ``pinctrl_put()`` that may be used to
+ explicitly destroy a pinctrl object returned by ``devm_pinctrl_get()``.
+ However, use of this function will be rare, due to the automatic cleanup that
+ will occur even without calling it.
- pinctrl_get() must be paired with a plain pinctrl_put().
- pinctrl_get() may not be paired with devm_pinctrl_put().
- devm_pinctrl_get() can optionally be paired with devm_pinctrl_put().
- devm_pinctrl_get() may not be paired with plain pinctrl_put().
+ ``pinctrl_get()`` must be paired with a ``plain pinctrl_put()``.
+ ``pinctrl_get()`` may not be paired with ``devm_pinctrl_put()``.
+ ``devm_pinctrl_get()`` can optionally be paired with ``devm_pinctrl_put()``.
+ ``devm_pinctrl_get()`` may not be paired with plain ``pinctrl_put()``.
Usually the pin control core handled the get/put pair and call out to the
device drivers bookkeeping operations, like checking available functions and
-the associated pins, whereas pinctrl_select_state() pass on to the pin controller
-driver which takes care of activating and/or deactivating the mux setting by
-quickly poking some registers.
+the associated pins, whereas ``pinctrl_select_state()`` pass on to the pin
+controller driver which takes care of activating and/or deactivating the mux
+setting by quickly poking some registers.
-The pins are allocated for your device when you issue the devm_pinctrl_get()
-call, after this you should be able to see this in the debugfs listing of all
-pins.
+The pins are allocated for your device when you issue the
+``devm_pinctrl_get()`` call, after this you should be able to see this in the
+debugfs listing of all pins.
-NOTE: the pinctrl system will return -EPROBE_DEFER if it cannot find the
+NOTE: the pinctrl system will return ``-EPROBE_DEFER`` if it cannot find the
requested pinctrl handles, for example if the pinctrl driver has not yet
registered. Thus make sure that the error path in your driver gracefully
cleans up and is ready to retry the probing later in the startup process.
@@ -1295,7 +1297,7 @@ So say that your driver is fetching its resources like this:
pinctrl = devm_pinctrl_get_select_default(&dev);
gpio = devm_gpiod_get(&dev, "foo");
-Here we first request a certain pin state and then request GPIO "foo" to be
+Here we first request a certain pin state and then request GPIO ``foo`` to be
used. If you're using the subsystems orthogonally like this, you should
nominally always get your pinctrl handle and select the desired pinctrl
state BEFORE requesting the GPIO. This is a semantic convention to avoid
@@ -1312,7 +1314,7 @@ to communicate directly with the pinctrl subsystem, using the latter as a
back-end. This is when the GPIO driver may call out to the functions
described in the section `Pin control interaction with the GPIO subsystem`_
above. This only involves per-pin multiplexing, and will be completely
-hidden behind the gpiod_*() function namespace. In this case, the driver
+hidden behind the ``gpiod_*()`` function namespace. In this case, the driver
need not interact with the pin control subsystem at all.
If a pin control driver and a GPIO driver is dealing with the same pins
@@ -1326,13 +1328,14 @@ pin control system.
System pin control hogging
==========================
-Pin control map entries can be hogged by the core when the pin controller
-is registered. This means that the core will attempt to call pinctrl_get(),
-pinctrl_lookup_state() and pinctrl_select_state() on it immediately after
-the pin control device has been registered.
+Pin control map entries can be hogged by the core when the pin controller is
+registered. This means that the core will attempt to call ``pinctrl_get()``,
+``pinctrl_lookup_state()`` and ``pinctrl_select_state()`` on it immediately
+after the pin control device has been registered.
-This occurs for mapping table entries where the client device name is equal
-to the pin controller device name, and the state name is PINCTRL_STATE_DEFAULT:
+This occurs for mapping table entries where the client device name is equal to
+the pin controller device name, and the state name is
+``PINCTRL_STATE_DEFAULT``:
.. code-block:: c
@@ -1366,9 +1369,9 @@ function, but with different named in the mapping as described under
"Advanced mapping" above. So that for an SPI device, we have two states named
"pos-A" and "pos-B".
-This snippet first initializes a state object for both groups (in foo_probe()),
-then muxes the function in the pins defined by group A, and finally muxes it in
-on the pins defined by group B:
+This snippet first initializes a state object for both groups (in
+``foo_probe()``), then muxes the function in the pins defined by group A, and
+finally muxes it in on the pins defined by group B:
.. code-block:: c
Thanks.
--
An old man doll... just what I always wanted! - Clara
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