On 9/28/22 22:23, Moger, Babu wrote: >> Hi Babu, >> >> The description text for each snippets above shouldn't in the code >> block. Also, split the block into three code blocks in the lists: > Did you mean, I need to remove similar texts from code? I mean extracting code description from the code block, see the diff below. >> >> ---- >8 ---- >> diff --git a/Documentation/x86/resctrl.rst b/Documentation/x86/resctrl.rst >> index b4fe54f219b6f3..ec578b069276ce 100644 >> --- a/Documentation/x86/resctrl.rst >> +++ b/Documentation/x86/resctrl.rst >> @@ -206,25 +206,26 @@ with the following files: >> all the event types and the mbm_local_bytes configuration is set to >> 0x15 to count all the local memory events. >> >> - Example:: >> + Examples: >> + >> + * To view the current configuration:: >> >> - To view the current configuration, run the command. >> # cat /sys/fs/resctrl/info/L3_MON/mbm_total_config >> 0:0x7f;1:0x7f;2:0x7f;3:0x7f >> >> # cat /sys/fs/resctrl/info/L3_MON/mbm_local_config >> 0:0x15;1:0x15;3:0x15;4:0x15 >> >> - To change the mbm_total_bytes to count only reads on domain 0, >> - run the command. The bits 0,1,4 and 5 needs to set. >> + * To change the mbm_total_bytes to count only reads on domain 0 >> + (the bits 0, 1, 4 and 5 needs to be set):: >> >> # echo "0:0x33" > /sys/fs/resctrl/info/L3_MON/mbm_total_config >> >> # cat /sys/fs/resctrl/info/L3_MON/mbm_total_config >> 0:0x33;1:0x7f;2:0x7f;3:0x7f >> >> - To change the mbm_local_bytes to count all the slow memory reads on >> - domain 1, run the command. The bits 4 and 5 needs to set. >> + * To change the mbm_local_bytes to count all the slow memory reads on >> + domain 1 (the bits 4 and 5 needs to be set):: >> >> # echo "1:0x30" > /sys/fs/resctrl/info/L3_MON/mbm_local_config >> > > Thanks for the diff. I cannot get this right for some reason. I will > probably send the diff before the final series. > > OK. >> >> Also, there isn't description of mapping from bits from the supported events >> table to the bytes input for mbm_{total,local}_config. > > It is already there. Is that not clear? No. I don't see why setting bits 0, 1, 4, and 5 on domain 0 translates to `0:0x33`, for example. >> >>> +Slow Memory b/w domain is L3 cache. >>> +:: >>> + >>> + SMBA:<cache_id0>=bandwidth0;<cache_id1>=bandwidth1;... >>> + >> What b/w stands for in the context above? > b/w is bandwidth. I will correct it. OK. Thanks for replying. -- An old man doll... just what I always wanted! - Clara